Patents by Inventor Cheon Ok JEONG
Cheon Ok JEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240143216Abstract: A storage device may execute an erase operation on a first metadata memory block. The storage device may copy, to the first metadata memory block, all or some of metadata units stored in a second metadata memory block that is a metadata memory block on which the erase operation is to be executed after the erase operation is executed on the first metadata memory block.Type: ApplicationFiled: February 14, 2023Publication date: May 2, 2024Inventor: Cheon Ok JEONG
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Publication number: 20240097885Abstract: The present disclosure relates to a storage device including a memory device to which a namespace including a plurality of zones is applied, a cache memory caching a media encryption key corresponding to each of a plurality of key tags, an encryptor encrypting data subject to a write request in response to a command input from a host by using a media encryption key corresponding to a key tag included in the command, and outputting encrypted data, and a write operation controller controlling the memory device to store the encrypted data in the memory device, wherein the media encryption key is a second media encryption key generated based on a first media encryption key provided from the host and a Root of Trust (RoT) generated from the encryptor.Type: ApplicationFiled: March 20, 2023Publication date: March 21, 2024Inventors: Han CHOI, Jae Yeon WON, Cheon Ok JEONG
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Patent number: 11544002Abstract: A memory system, a memory controller and an operating method are disclosed. When a target command which instructs an operation of writing target data to a memory device is received from a host, the target data is divided into data units, and a first data unit among the data units is controlled such that the entire first data unit is written to the memory device or none of the first data unit is written to the memory device. As a consequence, it is possible to write data in specific units in a memory system using a multi-core.Type: GrantFiled: March 19, 2020Date of Patent: January 3, 2023Assignee: SK hynix Inc.Inventors: Dae Hoon Jang, Dong Ham Yim, Young Hoon Cha, Young Guen Choi, Jeong Sun Park, Cheon Ok Jeong
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Patent number: 11169871Abstract: A data storage device includes a nonvolatile memory device including a plurality of memory blocks and a controller for controlling the nonvolatile memory device. A plurality of management blocks includes first and second management blocks managed by the controller. The second management block stores start data and then stores integrity data. The first management block stores a storage location of the second management block. An integrity checker checks integrity of data associated with the first and second management blocks.Type: GrantFiled: April 13, 2020Date of Patent: November 9, 2021Assignee: SK hynix Inc.Inventors: Jang Hwan Jun, Duck Hoi Koo, Soong Sun Shin, Yong Tae Kim, Yong Chul Kim, Cheon Ok Jeong
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Patent number: 10997039Abstract: A method for operating a data storage device which includes a nonvolatile memory device including a plurality of memory blocks, includes generating a valid page count table including the number of valid pages of each of closed blocks among the plurality of memory blocks in which data are written in all pages thereof and the number of valid pages of at least one open block among the plurality of memory blocks in which data is written in a part of pages thereof; generating a valid page scan table including a scan pointer for scanning the number of valid pages of the open block; and backing up the valid page count table and the valid page scan table in a meta block among the plurality of memory blocks.Type: GrantFiled: August 28, 2019Date of Patent: May 4, 2021Assignee: SK hynix Inc.Inventors: Duck Hoi Koo, Yong Tae Kim, Soong Sun Shin, Cheon Ok Jeong
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Publication number: 20210103405Abstract: A memory system, a memory controller and an operating method are disclosed. When a target command which instructs an operation of writing target data to a memory device is received from a host, the target data is divided into data units, and a first data unit among the data units is controlled such that the entire first data unit is written to the memory device or none of the first data unit is written to the memory device. As a consequence, it is possible to write data in specific units in a memory system using a multi-core.Type: ApplicationFiled: March 19, 2020Publication date: April 8, 2021Inventors: Dae Hoon JANG, Dong Ham YIM, Young Hoon CHA, Young Guen CHOI, Jeong Sun PARK, Cheon Ok JEONG
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Patent number: 10810118Abstract: A data storage device includes a nonvolatile memory device and a controller configured to control an operation of the nonvolatile memory device. The controller includes a volatile memory including a first index storage unit in which first index information for first data buffers are stored and a second index storage unit in which second index information for second data buffers are stored, a first central processing unit (CPU) configured to perform allocation and release of allocation of the first data buffers by accessing the first index storage unit of the volatile memory, and a second CPU configured to perform allocation and release of allocation of the second data buffers by accessing the second index storage unit of the volatile memory.Type: GrantFiled: June 6, 2018Date of Patent: October 20, 2020Assignee: SK hynix Inc.Inventors: Soong Sun Shin, Duck Hoi Koo, Yong Tae Kim, Cheon Ok Jeong
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Publication number: 20200241955Abstract: A data storage device includes a nonvolatile memory device including a plurality of memory blocks and a controller for controlling the nonvolatile memory device. A plurality of management blocks includes first and second management blocks managed by the controller. The second management block stores start data and then stores integrity data. The first management block stores a storage location of the second management block. An integrity checker checks integrity of data associated with the first and second management blocks.Type: ApplicationFiled: April 13, 2020Publication date: July 30, 2020Inventors: Jang Hwan JUN, Duck Hoi KOO, Soong Sun SHIN, Yong Tae KIM, Yong Chul KIM, Cheon Ok JEONG
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Patent number: 10725910Abstract: A controller may include a memory suitable for caching write data and map data corresponding to the write data; and a processor suitable for flushing the cached map data in a memory device, and then storing the write data in the memory device, wherein the map data includes location information of the write data.Type: GrantFiled: June 7, 2018Date of Patent: July 28, 2020Assignee: SK hynix Inc.Inventors: Duck-Hoi Koo, Yong-Tae Kim, Soong-Sun Shin, Cheon-Ok Jeong
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Patent number: 10691352Abstract: In a method of operating a data storage device including a non-volatile memory device, which includes a closed memory block and an open memory block, a scan pointer and a map scan information of the open memory block is generated. The scan pointer indicates a page next to a page to which a writing operation is completed. The map scan information includes a logical address information mapped in a page of the open memory block. When the data storage device is recovered from a power loss, the logical address information is read based on the map scan information. An address map is rebuilt based on the read logic address information.Type: GrantFiled: January 29, 2018Date of Patent: June 23, 2020Assignee: SK hynix Inc.Inventors: Duck Hoi Koo, Yong Tae Kim, Soong Sun Shin, Cheon Ok Jeong
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Patent number: 10671527Abstract: A method for operating a data storage device including a non-volatile memory device including a first region and a second region includes: storing data from a data cache memory in memory blocks in the first region; determining a first garbage collection cost with respect to a first target memory block having the least valid page among the memory blocks in the first region in which the data are kept; determining a second garbage collection cost with respect to a second target memory block having the least valid page among the memory blocks in the first region from which the data are cleared; and performing a garbage collection operation to copy valid data of a garbage collection target memory block into memory blocks in the second region based on a comparison result of the first garbage collection cost and the second garbage collection cost.Type: GrantFiled: December 4, 2017Date of Patent: June 2, 2020Assignee: SK hynix Inc.Inventors: Yong Tae Kim, Duck Hoi Koo, Soong Sun Shin, Cheon Ok Jeong
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Patent number: 10657046Abstract: A data storage device includes a nonvolatile memory device including memory block groups and map data blocks, each memory block group including a first page group storing data transmitted from a host device and a second page group storing address mapping information corresponding to the data; and a controller configured to determine whether the number of valid data stored in a first memory block group in which the second page group is damaged is equal to or smaller than a size of an available capacity of an open map data block which is being used, and control, when the number of the valid data is equal to or smaller than the available capacity, the nonvolatile memory device to store address mapping information corresponding to the valid data of the first memory block group, in the open map data block.Type: GrantFiled: June 21, 2018Date of Patent: May 19, 2020Assignee: SK hynix Inc.Inventors: Duck Hoi Koo, Yong Chul Kim, Yong Tae Kim, Cheon Ok Jeong
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Patent number: 10585792Abstract: A data processing system includes a host suitable for providing an access request; and a plurality of memory systems suitable for storing or reading data thereto or therefrom in response to the access request, wherein the host includes a host memory buffer suitable for storing a plurality of meta-data respectively corresponding to the plurality of memory systems, wherein each of the plurality of meta-data includes a first threshold value representing storage capacity for user data in a corresponding memory system among the plurality of memory systems, a second threshold value representing a number of read operations for logical block addresses (LBAs) of the corresponding memory system, a third threshold value representing a temperature of the corresponding memory system and respective LBAs of the plurality of memory systems.Type: GrantFiled: December 5, 2017Date of Patent: March 10, 2020Assignee: SK hynix Inc.Inventors: Soong-sun Shin, Duck-Hoi Koo, Yong-Tae Kim, Cheon-Ok Jeong
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Patent number: 10521138Abstract: A memory system including a nonvolatile memory device storing operation logs and map data; a volatile memory for temporarily storing the map data; and a controller flushing the map data from the volatile memory into the nonvolatile memory device by units of map data groups, and rebuilding the map data by selectively reading the map data by the units of map data groups from the nonvolatile memory device into the volatile memory according to the operation logs, wherein the operation logs indicate: locations of first and last pages to store the flushed map data; a start of an error management operation to a program error during the flushing of the map data; and a location of a last page storing normally flushed map data before an occurrence of the program error.Type: GrantFiled: December 11, 2017Date of Patent: December 31, 2019Assignee: SK hynix Inc.Inventors: Duck-Hoi Koo, Yong-Tae Kim, Soong-Sun Shin, Cheon-Ok Jeong
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Publication number: 20190384681Abstract: A method for operating a data storage device which includes a nonvolatile memory device including a plurality of memory blocks, includes generating a valid page count table including the number of valid pages of each of closed blocks among the plurality of memory blocks in which data are written in all pages thereof and the number of valid pages of at least one open block among the plurality of memory blocks in which data is written in a part of pages thereof; generating a valid page scan table including a scan pointer for scanning the number of valid pages of the open block; and backing up the valid page count table and the valid page scan table in a meta block among the plurality of memory blocks.Type: ApplicationFiled: August 28, 2019Publication date: December 19, 2019Inventors: Duck Hoi KOO, Yong Tae KIM, Soong Sun SHIN, Cheon Ok JEONG
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Patent number: 10430297Abstract: A method for operating a data storage device which includes a nonvolatile memory device including a plurality of memory blocks, includes generating a valid page count table including the number of valid pages of each of closed blocks among the plurality of memory blocks in which data are written in all pages thereof and the number of valid pages of at least one open block among the plurality of memory blocks in which data is written in a part of pages thereof; generating a valid page scan table including a scan pointer for scanning the number of valid pages of the open block; and backing up the valid page count table and the valid page scan table in a meta block among the plurality of memory blocks.Type: GrantFiled: December 4, 2017Date of Patent: October 1, 2019Assignee: SK hynix Inc.Inventors: Duck Hoi Koo, Yong Tae Kim, Soong Sun Shin, Cheon Ok Jeong
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Publication number: 20190163625Abstract: A data storage device includes a nonvolatile memory device including memory block groups and map data blocks, each memory block group including a first page group storing data transmitted from a host device and a second page group storing address mapping information corresponding to the data; and a controller configured to determine whether the number of valid data stored in a first memory block group in which the second page group is damaged is equal to or smaller than a size of an available capacity of an open map data block which is being used, and control, when the number of the valid data is equal to or smaller than the available capacity, the nonvolatile memory device to store address mapping information corresponding to the valid data of the first memory block group, in the open map data block.Type: ApplicationFiled: June 21, 2018Publication date: May 30, 2019Inventors: Duck Hoi KOO, Yong Chul KIM, Yong Tae KIM, Cheon Ok JEONG
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Publication number: 20190138447Abstract: A controller may include a memory suitable for caching write data and map data corresponding to the write data; and a processor suitable for flushing the cached map data in a memory device, and then storing the write data in the memory device, wherein the map data includes location information of the write data.Type: ApplicationFiled: June 7, 2018Publication date: May 9, 2019Inventors: Duck-Hoi KOO, Yong-Tae KIM, Soong-Sun SHIN, Cheon-Ok JEONG
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Publication number: 20190065362Abstract: A data storage device includes a nonvolatile memory device and a controller configured to control an operation of the nonvolatile memory device. The controller includes a volatile memory including a first index storage unit in which first index information for first data buffers are stored and a second index storage unit in which second index information for second data buffers are stored, a first central processing unit (CPU) configured to perform allocation and release of allocation of the first data buffers by accessing the first index storage unit of the volatile memory, and a second CPU configured to perform allocation and release of allocation of the second data buffers by accessing the second index storage unit of the volatile memory.Type: ApplicationFiled: June 6, 2018Publication date: February 28, 2019Inventors: Soong Sun SHIN, Duck Hoi KOO, Yong Tae KIM, Cheon Ok JEONG
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Publication number: 20190057049Abstract: A memory system includes a nonvolatile memory device including a plurality of planes; and a controller suitable for determining whether a first read operation for the nonvolatile memory device is a random read operation, and accessing at least one first target plane of the first read operation, according to an access merge process, depending on a determination result, wherein the controller simultaneously accesses the first target plane and at least one second target plane included in the nonvolatile memory device, according to the access merge process.Type: ApplicationFiled: December 18, 2017Publication date: February 21, 2019Inventors: Duck Hoi KOO, Soong Sun SHIN, Yong Tae KIM, Cheon Ok JEONG