Patents by Inventor Cheryl Anne Bollinger

Cheryl Anne Bollinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiple purpose reticle layout for selective printing of test circuits
    Patent number: 6893806
    Abstract: A method for manufacturing a semiconductor wafer uses a reticle having a plurality of spaced apart circuit images of identical patterns or images of a common level of a single integrated circuit formed on the reticle and arranged in columns and rows about its central point. At least one column of spaced apart test images are formed outside of and adjacent an outermost column of circuit images. Radiation is projected through the reticle for exposing the patterns on the reticle onto an underlying wafer. A reticle holder having a pair of shutter elements aligned parallel to the columns of images selectively blocks the projection of radiation through the columns of the test images but are exposed in order to form test circuits on the wafer at selected locations.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: May 17, 2005
    Assignee: Agere Systems, Inc.
    Inventors: Cheryl Anne Bollinger, Seungmoo Choi, William T. Cochran, Stephen Arlon Meisner, Daniel Mark Wroge, Gerard Zaneski
  • Multiple purpose reticle layout for selective printing of test circuits
    Publication number: 20030039928
    Abstract: A method for manufacturing a semiconductor wafer uses a reticle having a plurality of spaced apart circuit images of identical patterns or images of a common level of a single integrated circuit formed on the reticle and arranged in columns and rows about its central point. At least one column of spaced apart test images are formed outside of and adjacent an outermost column of circuit images. Radiation is projected through the reticle for exposing the patterns on the reticle onto an underlying wafer. A reticle holder having a pair of shutter elements aligned parallel to the columns of images selectively blocks the projection of radiation through the columns of the test images but are exposed in order to form test circuits on the wafer at selected locations.
    Type: Application
    Filed: August 15, 2002
    Publication date: February 27, 2003
    Inventors: Cheryl Anne Bollinger, Seungmoo Choi, William T. Cochran, Stephen Arlon Meisner, Daniel Mark Wroge, Gerard Zaneski
  • Integrated circuit dielectric formation
    Patent number: 6140222
    Abstract: An integrated circuit and its method of formation are disclosed. The circuit utilizes a spin-on glass as an interlevel dielectric. Above and below the spin-on glass is located a phosphorous doped dielectric. The doped dielectric prevents sodium from becoming mobile under the influence of subsequently applied electric fields.
    Type: Grant
    Filed: July 21, 1995
    Date of Patent: October 31, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Cheryl Anne Bollinger, Catherine Ann Fieber, Kurt George Steiner
  • Multilayered A1-alloy structure for metal conductors
    Patent number: 5641994
    Abstract: A Si IC includes an Al-based layer which is deposited as a composite of sublayers of different composition Al-based materials. In one embodiment a first sublayer comprises an Al-Si-based alloy disposed so as to prevent substantial Si migration into the first sublayer, and a second sublayer, above the first, comprises an Al-based alloy with substantially no Si to alleviate precipitation-induced problems.
    Type: Grant
    Filed: June 26, 1996
    Date of Patent: June 24, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Cheryl Anne Bollinger, Edward Alan Dein, Sailesh Mansinh Merchant, Arun Kumar Nanda, Pradip Kumar Roy, Cletus Walter Wilkins, Jr.