Patents by Inventor Chetan Hiremath

Chetan Hiremath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7752468
    Abstract: A method is to include implementing at least one statistical prediction model to predict memory power utilization and reduce power consumption for a computing platform. The implementation includes determining a configuration parameter for the computing platform, monitoring an operating parameter for the computing platform and predicting memory power utilization for the computing platform based on the determined configuration parameter and the monitored operating parameter. The method is to also include transitioning at least one memory module resident on the computing platform to one of a plurality of power states based at least in part on memory power utilization predicted via the implementation of the at least one statistical prediction model.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: July 6, 2010
    Assignee: Intel Corporation
    Inventors: Rakesh Dodeja, Neelam Chandwani, Chetan Hiremath, Udayan Mukherjee, Anthony Ambrose
  • Patent number: 7702966
    Abstract: A method for managing a system includes monitoring a plurality of applications running in the system for errors. A prediction is made as to whether errors detected would result in a failure. Fault recovery is initiated in response to a failure prediction. According to one aspect of the present invention, monitoring the plurality of applications includes reading error recorders associated with error occurrence. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: April 20, 2010
    Assignee: Intel Corporation
    Inventors: Neelam Chandwani, Udayan Mukherjee, Chetan Hiremath, Rakesh Dodeja
  • Patent number: 7558849
    Abstract: A hardware management module is enabled to perform hardware management for a modular platform system that includes a plurality of modular platform shelves coupled via one or more communication links in a network. Hardware management to include monitoring board interfaces resident on one or more backplanes within the plurality of modular platform shelves, detecting when a board is received and coupled to a board interface and performing one or more hardware management functions to include obtaining field replaceable unit information from the detected board.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: July 7, 2009
    Assignee: Intel Corporation
    Inventors: Neelam Chandwani, Udayan Mukherjee, Chetan Hiremath, Rakesh Dodeja
  • Patent number: 7424396
    Abstract: Faults are monitored with information from agents for a plurality of sensors located on a plurality of circuit boards. A policy containing a error event thresholds against which the stored sensor information can be compared. Actions can be initiated by a fault module when one or more of the error event thresholds is exceeded.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: September 9, 2008
    Assignee: Intel Corporation
    Inventors: Rakesh Dodeja, Neelam Chandwani, Chetan Hiremath, Wen Wei, Udayan Mukherjee
  • Patent number: 7424666
    Abstract: A fault module supports detection, analysis, and/or logging of various faults in a processor system. In one embodiment, the system is provided on a multi-core, single die device.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: September 9, 2008
    Assignee: Intel Corporation
    Inventors: Neelam Chandwani, Udayan Mukheriee, Santosh Balakrishnan, Rakesh Dodeja, Chetan Hiremath
  • Patent number: 7340538
    Abstract: A method for dynamic assignment of slot-dependent static network port addresses. Under the method, a slot address and shelf address are determined for a card modular platform board installed in a given slot in a shelf. The slot and shelf addresses are used as inputs to return a unique network address. The unique network address is then assigned as a static network address for the board's network port. The unique address may be provided by an address proxy, including a boot server. Firmware and/or software stored on a board may also be employed to obtain the static network address. The address may be obtained from a pre-configured lookup table, or dynamically determined using an algorithm.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: March 4, 2008
    Assignee: Intel Corporation
    Inventors: Kuriappan P. Alappat, Chetan Hiremath
  • Publication number: 20070283178
    Abstract: A method is to include implementing at least one statistical prediction model to predict memory power utilization and reduce power consumption for a computing platform. The implementation includes determining a configuration parameter for the computing platform, monitoring an operating parameter for the computing platform and predicting memory power utilization for the computing platform based on the determined configuration parameter and the monitored operating parameter. The method is to also include transitioning at least one memory module resident on the computing platform to one of a plurality of power states based at least in part on memory power utilization predicted via the implementation of the at least one statistical prediction model.
    Type: Application
    Filed: June 6, 2006
    Publication date: December 6, 2007
    Inventors: Rakesh Dodeja, Neelam Chandwani, Chetan Hiremath, Udayan Mukherjee, Anthony Ambrose
  • Patent number: 7283921
    Abstract: A modeling module is disclosed that couples to a modular platform chassis. The modeling module includes a resident management controller to implement a test to model a component layout for a module to be received and coupled to the modular platform chassis. The test includes an operating thermal load for a component resident on the module at a given location. The module has a dimensional length and width that is similar to that of the modeling module. The modeling module also includes a thermal load device that is responsive to the management controller. The thermal load device is to implement at least a portion of the test by simulating the operating thermal load for the component resident on the module at the given location.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: October 16, 2007
    Assignee: Intel Corporation
    Inventors: Neelam Chandwani, Udayan Mukherjee, Wen Wei, Chetan Hiremath, Rakesh Dodeja, Kevin W. Bross
  • Publication number: 20070088974
    Abstract: A fault module supports detection, analysis, and/or logging of various faults in a processor system. In one embodiment, the system is provided on a multi-core, single die device.
    Type: Application
    Filed: September 26, 2005
    Publication date: April 19, 2007
    Inventors: Neelam Chandwani, Udayan Mukheriee, Santosh Balakrishnan, Rakesh Dodeia, Chetan Hiremath
  • Publication number: 20070089011
    Abstract: Faults are monitored with information from agents for a plurality of sensors located on a plurality of circuit boards. A policy containing a error event thresholds against which the stored sensor information can be compared. Actions can be initiated by a fault module when one or more of the error event thresholds is exceeded.
    Type: Application
    Filed: September 26, 2005
    Publication date: April 19, 2007
    Inventors: Rakesh Dodeja, Neelam Chandwani, Chetan Hiremath, Wen Wei, Udayan Mukherjee
  • Publication number: 20070055914
    Abstract: A method for managing a system includes monitoring a plurality of applications running in the system for errors. A prediction is made as to whether errors detected would result in a failure. Fault recovery is initiated in response to a failure prediction. According to one aspect of the present invention, monitoring the plurality of applications includes reading error recorders associated with error occurrence. Other embodiments are described and claimed.
    Type: Application
    Filed: September 7, 2005
    Publication date: March 8, 2007
    Inventors: Neelam Chandwani, Udayan Mukherjee, Chetan Hiremath, Rakesh Dodeja
  • Publication number: 20070038732
    Abstract: A hardware management module is enabled to perform hardware management for a modular platform system that includes a plurality of modular platform shelves coupled via one or more communication links in a network. Hardware management to include monitoring board interfaces resident on one or more backplanes within the plurality of modular platform shelves, detecting when a board is received and coupled to a board interface and performing one or more hardware management functions to include obtaining field replaceable unit information from the detected board.
    Type: Application
    Filed: August 10, 2005
    Publication date: February 15, 2007
    Inventors: Neelam Chandwani, Udayan Mukherjee, Chetan Hiremath, Rakesh Dodeja
  • Publication number: 20070038407
    Abstract: A modeling module is disclosed that couples to a modular platform chassis. The modeling module includes a resident management controller to implement a test to model a component layout for a module to be received and coupled to the modular platform chassis. The test includes an operating thermal load for a component resident on the module at a given location. The module has a dimensional length and width that is similar to that of the modeling module. The modeling module also includes a thermal load device that is responsive to the management controller. The thermal load device is to implement at least a portion of the test by simulating the operating thermal load for the component resident on the module at the given location.
    Type: Application
    Filed: August 10, 2005
    Publication date: February 15, 2007
    Inventors: Neelam Chandwani, Udayan Mukherjee, Wen Wei, Chetan Hiremath, Rakesh Dodeja, Kevin Bross
  • Publication number: 20060023384
    Abstract: A method according to one embodiment may include discovering, by software, at least one variable from at least one component populated on a shelf system. The method may also include performing, by the software, at least one shelf management function based on at least one variable. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Application
    Filed: July 28, 2004
    Publication date: February 2, 2006
    Inventors: Udayan Mukherjee, Chetan Hiremath
  • Publication number: 20050273588
    Abstract: A method includes storing a plurality of interchangeable BIOS images, selecting a first one of the BIOS images, and attempting to perform a boot procedure using the selected first one of the BIOS images. If the boot procedure is performed successfully, a signal is sent to control logic. If the control logic does not receive the signal: (a) a second one of the BIOS images is selected, (b) a reset condition is initiated, and (c) in response to the reset condition, an attempt is made to perform a boot procedure using the selected second one of the BIOS images.
    Type: Application
    Filed: June 8, 2004
    Publication date: December 8, 2005
    Inventors: Soo Ong, Peter Trinh, Douglas Bogia, Chetan Hiremath, Tisson Mathew
  • Publication number: 20050125575
    Abstract: A method for dynamic assignment of slot-dependent static network port addresses. Under the method, a slot address and shelf address are determined for a card modular platform board installed in a given slot in a shelf. The slot and shelf addresses are used as inputs to return a unique network address. The unique network address is then assigned as a static network address for the board's network port. The unique address may be provided by an address proxy, including a boot server. Firmware and/or software stored on a board may also be employed to obtain the static network address. The address may be obtained from a pre-configured lookup table, or dynamically determined using an algorithm.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 9, 2005
    Inventors: Kuriappan Alappat, Chetan Hiremath
  • Publication number: 20040260841
    Abstract: A method, apparatus, and system for communicating Internet protocol formatted information across an intelligent platform management bus.
    Type: Application
    Filed: June 19, 2003
    Publication date: December 23, 2004
    Inventors: Tisson K. Mathew, Chetan Hiremath
  • Publication number: 20040024659
    Abstract: A method and apparatus for performing an administrative and maintenance task, in a multi-component system, is provided. The apparatus includes a plurality of components performing different operations. One of the plurality of components monitors the operations of the other components and determines if there is a component operating improperly. When a malfunctioning component is detected, the apparatus locates information associated with the malfunctioning component and automatically generates an order at a supplier and maintenance service.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 5, 2004
    Inventors: Tisson Mathew, Chetan Hiremath