Patents by Inventor Chetan Paragaonkar

Chetan Paragaonkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11128410
    Abstract: Embodiments disclosed are directed to methods for scheduling packets. According to example embodiments the method includes receiving, using a first layer in a communication protocol, a first request from a second layer in the communication protocol. The first request indicates to the first layer to output a data stream that includes a first location for the second layer to include a first control packet. The first layer is at a higher level of abstraction than the second layer. The method further includes transmitting, using the first layer, a first response to the second layer. The first response is based on the first request, and the first response identifies the first location in the data stream and a time of occurrence of the first location in the data stream.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: September 21, 2021
    Assignee: Cadence Design Systems, Inc.
    Inventors: Chetan Paragaonkar, Gopi Krishnamurthy, Anish Mathew, Raveendra Pai Gopalakrishna, Anujan Varma
  • Patent number: 8782295
    Abstract: A method and apparatus, such as multi-engine controller that can be used to control multiple data processing engines in a command based IO processing system, such as a storage controller, to solve to the problem of scaling the data processing rate to match the advances in the IO interface data rates, including a method of identifying dependencies among various tasks queued up in the system and scheduling tasks out-of-order to avoid head of line blocking, a method to buffer and reorder the completed tasks such that the task output order is the same as that in the input to the system.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: July 15, 2014
    Assignee: PMC-Sierra US, Inc.
    Inventors: Chetan Paragaonkar, Kuan Hua Tan
  • Publication number: 20140095737
    Abstract: A method and apparatus, such as multi-engine controller that can be used to control multiple data processing engines in a command based IO processing system, such as a storage controller, to solve to the problem of scaling the data processing rate to match the advances in the IO interface data rates, including a method of identifying dependencies among various tasks queued up in the system and scheduling tasks out-of-order to avoid head of line blocking, a method to buffer and reorder the completed tasks such that the task output order is the same as that in the input to the system.
    Type: Application
    Filed: November 29, 2013
    Publication date: April 3, 2014
    Applicant: PMC-SIERRA US, INC
    Inventors: Chetan PARAGAONKAR, Kuan Hua TAN
  • Patent number: 8601169
    Abstract: A method and apparatus, such as multi-engine controller that can be used to control multiple data processing engines in a command based IO processing system, such as a storage controller, to solve to the problem of scaling the data processing rate to match the advances in the IO interface data rates, including a method of identifying dependencies among various tasks queued up in the system and scheduling tasks out-of-order to avoid head of line blocking, a method to buffer and reorder the completed tasks such that the task output order is the same as that in the input to the system.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: December 3, 2013
    Assignee: PMC-Sierra US, Inc.
    Inventors: Chetan Paragaonkar, Kuan Hua Tan