Patents by Inventor Chi-An Chen

Chi-An Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240173819
    Abstract: A wafer grinding parameter optimization method and an electronic device are provided. The method includes the following. A natural frequency of a grinding wheel spindle of wafer processing equipment is obtained, and a grinding stability lobe diagram is generated accordingly. A grinding speed is selected based on a speed range of the grinding wheel spindle. Multiple grinding parameter combinations are determined based on the grinding speed. Multiple grinding simulation result combinations corresponding to the grinding parameter combinations are generated. A specific grinding parameter combination is selected based on each of the grinding simulation result combinations, and the wafer processing equipment is set accordingly.
    Type: Application
    Filed: September 12, 2023
    Publication date: May 30, 2024
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Chih-Chun Cheng, Wen-Nan Cheng, Meng-Bi Lin, Chi-Feng Li, Tzu-Fan Chiang, Wei-Jen Chen, Chien Hung Chen, Hsiu Chi Liang, Ying-Ru Shih
  • Publication number: 20240175836
    Abstract: A gas detector includes: a substrate, a heater, a first resistor and a second resistor. The heater is disposed on the substrate. The first resistor is disposed on the heater, and has a first resistance value associated with a target gas. The second resistor is connected in series with the first resistor and is disposed on the substrate, wherein the first resistor and the second resistor are formed in the same manufacturing process and in the same shape.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 30, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Chi KUO, Bor-Shiun LEE, Ming-Fa CHEN
  • Patent number: 11996461
    Abstract: Semiconductor structures and methods of forming the same are provided. A semiconductor structure according to one embodiment includes first nanostructures, a first gate structure wrapping around each of the first nanostructures and disposed over an isolation structure, and a backside gate contact disposed below the first nanostructures and adjacent to the isolation structure. A bottom surface of the first gate structure is in direct contact with the backside gate contact.
    Type: Grant
    Filed: May 22, 2023
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Lo-Heng Chang, Li-Zhen Yu, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
  • Patent number: 11996165
    Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: May 28, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsiang-Chi Cheng, Shyh-Bin Kuo, Yi-Cheng Lai, Chung-Hung Chen, Shih-Hsien Yang, Yu-Chih Wang, Kuo-Hsiang Chen
  • Patent number: 11996866
    Abstract: A feedback control system configured to drive a load is disclosed. The feedback control system includes an up-sampling circuit, configured to perform an un-sampling operation on a source signal and produce an up-sampled signal with an up-sampling frequency according to the up-sampled signal and a feedback signal from the load; a delta circuit, coupled to the up-sampling circuit and configured to produce a delta signal; a sigma circuit, configured to produce a density modulation signal according to the delta signal; and a driving device, configured to drive the load according to the density modulation signal with the up-sampling frequency.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: May 28, 2024
    Assignee: xMEMS Labs, Inc.
    Inventors: Jemm Yue Liang, Hsi-Sheng Chen, Chieh-Yao Chang, Hung-Chi Huang, Jing-Meng Liu
  • Patent number: 11996276
    Abstract: An ion collector includes a plurality of segments and a plurality of integrators. The plurality of segments are physically separated from one another and spaced around a substrate support. Each of the segments includes a conductive element that is designed to conduct a current based on ions received from a plasma. Each of the plurality of integrators is coupled to a corresponding conductive element. Each of the plurality of integrators is designed to determine an ion distribution for a corresponding conductive element based, at least in part, on the current conducted at the corresponding conductive element. An example benefit of this embodiment includes the ability to determine how uniform the ion distribution is across a wafer being processed by the plasma.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: May 28, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Otto Chen, Chi-Ying Wu, Chia-Chih Chen
  • Patent number: 11995810
    Abstract: A system and method for generating a stained image including the steps of obtaining a first image of a key sample section; and processing the first image with a multi-modal stain learning engine arranged to generate at least one stained image, wherein the at least one stained image represents the key sample section stained with at least one stain.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: May 28, 2024
    Assignee: City University of Hong Kong
    Inventors: Condon Lau, Tik Ho Hui, Yixuan Yuan, Zhen Chen, Chi Shing Cho, Wah Cheuk, Wing Lun Law, Mohamad Ali Marashli, Anupam Pani, Fraser Hill
  • Patent number: 11996428
    Abstract: An image sensor includes an array of image pixels and black level correction (BLC) pixels. Each BLC pixel includes a BLC pixel photodetector, a BLC pixel sensing circuit, and a BLC pixel optics assembly configured to block light that impinges onto the BLC pixel photodetector. Each BLC pixel optics assembly may include a first portion of a layer stack including a vertically alternating sequence of first material layers having a first refractive index and second material layers having a second refractive index. Additionally or alternatively, each BLC pixel optics assembly may include a first portion of a layer stack including at least two metal layers, each having a respective wavelength sub-range having a greater reflectivity than another metal layer. Alternatively or additionally, each BLC pixel optics assembly may include an infrared blocking material layer that provides a higher absorption coefficient than color filter materials within image pixel optics assemblies.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: May 28, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Hsin-Chi Chen
  • Publication number: 20240172434
    Abstract: A semiconductor device includes a stacked gate structure, a plurality of stacks and a first conductive layer. The stacks are disposed aside the stacked gate structure and arranged along both a first direction and a second direction perpendicular to the first direction, wherein the stacks are extended continuously along the first direction and segmented in the second direction. The first conductive layer is disposed between segmented portions of the stacks along the second direction, wherein top surfaces of the segmented portions of the stacks are higher than a top surface of the first conductive layer.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Publication number: 20240167204
    Abstract: A breathable and waterproof non-woven fabric is manufactured by a manufacturing method including the following steps. Performing a kneading process on 87 to 91 parts by weight of a polyester, 5 to 7 parts by weight of a water repellent, and 3 to 6 parts by weight of a flow promoter to form a mixture, in which the polyester has a melt index between 350 g/10 min and 1310 g/10 min at a temperature of 270° C., and the mixture has a melt index between 530 g/10 min and 1540 g/10 min at a temperature of 270° C. Performing a melt-blowing process on the mixture, such that the flow promoter is volatilized and a melt-blown fiber is formed, in which the melt-blown fiber has a fiber body and the water repellent disposed on the fiber body with a particle size (D90) between 350 nm and 450 nm.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Inventors: Ying-Chi LIN, Wei-Hung CHEN, Li-Chen CHU, Rih-Sheng CHIANG
  • Publication number: 20240170489
    Abstract: A circuit includes a base silicon layer, a base oxide layer, a first top silicon layer, a second top silicon layer, a first semiconductor device, and a second semiconductor device. The base oxide layer is formed over the base silicon layer. The first top silicon layer is formed over a first region of the base oxide layer and has a first thickness. The second top silicon layer is formed over a second region of the base oxide layer and has a second thickness less than the first thickness. The first semiconductor device is formed over the first top silicon layer and the second semiconductor device is formed over the second top silicon layer. The ability to fabricate a top silicon layers with differing thicknesses can provide a single substrate having devices with different characteristics, such as having both fully depleted and partially depleted devices on a single substrate.
    Type: Application
    Filed: January 29, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Gulbagh Singh, Kuan-Liang Liu, Wang Po-Jen, Kun-Tsang Chuang, Hsin-Chi Chen
  • Publication number: 20240170385
    Abstract: A semiconductor package device is provided. The semiconductor package device includes a chip and a redistribution layer disposed on the chip and electrically connected to the chip. The redistribution layer includes a plurality of first metal lines and a plurality of second metal lines, wherein at least one of the second metal lines is disposed between two adjacent first metal lines. The included angle between the at least one of the second metal lines and the two adjacent first metal lines is greater than or equal to 0 degrees and less than or equal to 10 degrees. The first width of one of the two adjacent first metal lines is greater than the second width of the at least one of the second metal lines.
    Type: Application
    Filed: December 22, 2022
    Publication date: May 23, 2024
    Inventors: Te-Hsun LIN, Wen-Hsiang LIAO, Mei-Yen CHEN, Ming-Hsien SHIH, Yung-Feng CHEN, Cheng-Chi WANG
  • Publication number: 20240170583
    Abstract: A wide-band gap semiconductor device and a method of manufacturing the same are provided. The wide-band gap semiconductor device of the disclosure includes a substrate, an epitaxial layer, an array of merged PN junction Schottky (MPS) diode, and an edge termination area surrounding the array of MPS diode. The epitaxial layer includes a first plane, a second plane, and trenches between the first plane and the second plane. The array of MPS diode is formed in the first plane of the epitaxial layer. The edge termination area includes a floating ring region having floating rings formed in the second plane of the epitaxial layer, and a transition region between the floating ring region and the array of MPS diode. The transition region includes a PIN diode formed in the plurality of trenches and on the epitaxial layer between the trenches.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Applicant: LEAP Semiconductor Corp.
    Inventors: Wei-Fan Chen, Kuo-Chi Tsai
  • Patent number: 11990493
    Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a front surface, a back surface opposite to the front surface, and a light-sensing region close to the front surface. The image sensor device includes an insulating layer covering the back surface and extending into the semiconductor substrate. The protection layer has a first refractive index, and the first refractive index is less than a second refractive index of the semiconductor substrate and greater than a third refractive index of the insulating layer, and the protection layer conformally and continuously covers the back surface and extends into the semiconductor substrate. The image sensor device includes a reflective structure surrounded by insulating layer in the semiconductor substrate.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Fang, Ming-Chi Wu, Ji-Heng Jiang, Chi-Yuan Wen, Chien-Nan Tu, Yu-Lung Yeh, Shih-Shiung Chen, Kun-Yu Lin
  • Patent number: 11989992
    Abstract: An authority control system includes a biometric identification unit, a near field communication (NFC) signal transmission unit, and an NFC signal receiving unit. The biometric identification unit stores associated data, configured to obtain first biometric data, obtains encoded data according to the first biometric data and the associated data, and transmits the encoded data. The NFC signal transmission unit is configured to receive the encoded data transmitted by the biometric identification unit, and transmit the encoded data by using an NFC transmission technology. The NFC signal receiving unit stores authorization type comparison data. The NFC signal receiving unit is configured to receive the encoded data transmitted by the NFC signal transmission unit, and determines an authorization type according to the encoded data and the authorization type comparison data.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 21, 2024
    Assignee: LUXSHARE-ICT CO., LTD.
    Inventors: Guan-Chi Chen, Yen-Chuan Lin, Hao-Ying Chang
  • Patent number: 11986869
    Abstract: A method of cleaning includes placing a semiconductor device manufacturing tool component made of quartz on a support. A cleaning fluid inlet line is attached to a first open-ended tubular quartz projection extending from an outer main surface of the semiconductor device manufacturing tool component. A cleaning fluid is applied to the semiconductor device manufacturing tool component by introducing the cleaning fluid through the cleaning fluid inlet line and the tubular quartz projection.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi Chen Ho, Chih Ping Liao, Ker-hsun Liao, Chi-Hsun Lin
  • Patent number: 11991433
    Abstract: Examples disclosed herein provide a computing device. As an example, the computing device includes a housing having an opening extending through the housing, to accommodate a lens of a camera. The computing device includes a shutter to selectively obscure the opening, where the shutter is slidable between a first position and a second position. While in the first position, the shutter is to obscure the opening while a microphone of the computing device is enabled and, while in the second position, the shutter is to obscure the opening and disable the microphone.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: May 21, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ching-Ming Wang, Hui-Jen Tseng, Yen-Chi Chen
  • Patent number: 11988831
    Abstract: A method of displaying a rear-view image and a mobile device using the method are provided. The method includes: receiving the rear-view image; displaying a virtual dashboard through a display; and displaying the rear-view image on a default area of the virtual dashboard in response to receiving a signal associated with a direction indicator light, wherein the default area corresponds to the direction indicator light.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: May 21, 2024
    Assignee: Kinpo Electronics, Inc.
    Inventors: Yu Chi Chen, Hsien Chung Chen, Sheng-Chang Wu
  • Patent number: 11990553
    Abstract: A merged PiN Schottky (MPS) diode includes a substrate, a first epitaxial layer of a first conductivity type, doped regions of a second conductivity type, a second epitaxial layer of the first conductivity type, and a Schottky metal layer. The first epitaxial layer is disposed on the first surface of the substrate. The doped regions are disposed in a surface of the first epitaxial layer, wherein the doped regions consist of first portions and second portions, the first portions are electrically floating, and the second portions are electrically connected to a top metal. The second epitaxial layer is disposed on the surface of the first epitaxial layer, wherein trenches are formed in the second epitaxial layer to expose the second portions of the doped regions. The Schottky metal layer is conformally deposited on the second epitaxial layer and the exposed second portions of the doped regions.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: May 21, 2024
    Assignee: LEAP Semiconductor Corp.
    Inventors: Wei-Fan Chen, Kuo-Chi Tsai
  • Patent number: D1027976
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: May 21, 2024
    Assignee: VIVOTEK INC.
    Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen, Shu-Jung Hsu, Tsao-Wei Hung