Patents by Inventor Chi Chen

Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978503
    Abstract: The present disclosure relates to a method and apparatus for determining a signal margin (SM) of a memory cell, a storage medium and an electronic device, and relates to the technical field of integrated circuits. The method for determining an SM of a memory cell includes: when the memory cell performs write and read operations, determining a sense signal threshold of the memory cell under an influence of a noise; and determining, based on the sense signal threshold, an actual SM of the memory cell during data reading.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: May 7, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Jian Chen, Chi-Shian Wu
  • Patent number: 11976018
    Abstract: Disclosed is a diamine compound represented by Formula (1), in which R1, R2, R3, R4, R5, X1, X2, X3, X4, m, n, a, b, c, and d are as defined herein. Also disclosed are a method for manufacturing the diamine compound, a composition including the diamine compound having a (chain alkoxy-methylene) phenyl group or a (hydroxyl-methylene) phenyl group, and a polymer including the (chain alkoxy-methylene) phenyl group or the (hydroxyl-methylene) phenyl group.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: May 7, 2024
    Assignee: DAXIN MATERIALS CORP.
    Inventors: Kai-Sheng Jeng, Yuan-Li Liao, You-Ming Chen, Yu-Ying Kuo, Shao-Chi Cheng
  • Patent number: 11976776
    Abstract: A stand adjustment device has a tripod-connecting member, a connecting seat, a proximal clamping plate, a boom-connecting tube, a locking shaft, and a manual operating member. The connecting seat is rotatably located around the tripod-connecting member. The proximal clamping plate is detachably attached to a side of the connecting seat. One end of the locking shaft is movably disposed in the boom-connecting tube. The boom is slidably mounted through the boom-connecting tube and the locking shaft. The locking shaft is slidably mounted through the boom-connecting tube, the proximal clamping plate, and the connecting seat such that the boom-connecting tube is rotatable relative to the connecting seat. The manual operating member and the locking shaft are configured to clamp the boom-connecting tube, the proximal clamping plate, and the connecting seat therebetween into a locked condition.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: May 7, 2024
    Assignee: RELIANCE INTERNATIONAL CORP.
    Inventors: Pei-Chi Chu, Cheng-Lin Ho, Chi-Chia Huang, Wei-Ting Chen
  • Patent number: 11978773
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Shih-Chuan Chiu, Cheng-Chi Chuang, Chih-Hao Wang
  • Patent number: 11976124
    Abstract: The present disclosure provides isolated monoclonal antibodies or an antigen-binding portion thereof that specifically bind to CD40 preferably human CD40 with high affinity, and that function as CD40 agonists. The disclosed invention also relates to antibodies that are chimeric, humanized, bispecific, derivatized, single chain antibodies or portions of fusion proteins. Nucleic acid molecules encoding the antibodies of the disclosed invention, hybridoma, and methods for expressing the antibodies of the disclosed invention are also provided. Pharmaceutical compositions comprising the antibodies of the disclosed invention are also provided. This disclosure also provides methods for regulating humoral and cellular immune responses, as well as methods for treating cancer using an anti-CD40 agonist antibody of the disclosed invention.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 7, 2024
    Assignee: ABVISION, INC.
    Inventors: Chang-Hsin Chen, Gloria Zhang, Guochen Yan, Cheng-Chi Chao
  • Publication number: 20240145370
    Abstract: A semiconductor device includes a first region and a second region, and the second region surrounds the first region. The semiconductor device includes at least one electronic unit, a redistribution structure, a plurality of first pads, and a plurality of second pads. The redistribution structure may be electrically connected to at least one electronic unit. A plurality of first pads are arranged on the redistribution structure and correspondingly to the first region. There is a first pitch between two adjacent first pads. A plurality of second pads are arranged on the redistribution structure and correspondingly to the second region. There is a second pitch between two adjacent second pads, so that the first pitch is smaller than the second pitch.
    Type: Application
    Filed: December 18, 2022
    Publication date: May 2, 2024
    Applicant: InnoLux Corporation
    Inventors: Te-Hsun LIN, Wen-Hsiang LIAO, Ming-Hsien SHIH, Yung-Feng CHEN, Cheng-Chi WANG
  • Publication number: 20240143189
    Abstract: An apparatus comprises a processing device configured to maintain, for a storage system implementing a mapped redundant array of independent disks (RAID) configuration including disk groups providing RAID groups comprising data and hot spare extents, a shared pool of hot spare extents comprising first and second sets of hot spare extents from first and second ones of the disk groups. The processing device is further configured to detect failure of a disk in the first disk group, to determine whether available ones of the first set of hot spare extents provide sufficient storage capacity for rebuilding the failed disk and, responsive to determining that available ones of the first set of hot spare extents do not provide sufficient storage capacity for rebuilding the failed disk, to rebuild the failed disk utilizing one or more of the second set of hot spare extents in the shared pool of hot spare extents.
    Type: Application
    Filed: November 15, 2022
    Publication date: May 2, 2024
    Inventors: Hailan Dong, Si Zhang, Chi Chen
  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Publication number: 20240145245
    Abstract: Embodiments of the present disclosure generally relate to methods for enhancing carbon hardmask to have improved etching selectivity and profile control. In some embodiments, a method of treating a carbon hardmask layer is provided and includes positioning a workpiece within a process region of a processing chamber, where the workpiece has a carbon hardmask layer disposed on or over an underlying layer, and treating the carbon hardmask layer by exposing the workpiece to a sequential infiltration synthesis (SIS) process to produce an aluminum oxide carbon hybrid hardmask which is denser than the carbon hardmask layer. The SIS process includes exposing and infiltrating the carbon hardmask layer with an aluminum precursor, purging to remove gaseous remnants, exposing and infiltrating the carbon hardmask layer to an oxidizing agent to produce an aluminum oxide coating disposed on inner surfaces of the carbon hardmask layer, and purging the process region to remove gaseous remnants.
    Type: Application
    Filed: August 24, 2023
    Publication date: May 2, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Yung-chen LIN, Zhiyu HUANG, Chi-I LANG, Ho-yung HWANG
  • Publication number: 20240142301
    Abstract: The present disclosure provides a sensing circuit, including a photo-sensing component, a first transistor, and a temperature-sensing component. The photo-sensing component is configured to receive a light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control circuit. The photo-sensing component and the first transistor are coupled in series between first and second nodes. The temperature-sensing component is coupled between the first and second nodes and is configured to generate a second current according to a temperature. The temperature-sensing component includes a channel structure, a first gate, a second gate, and a light-shielding structure. The channel structure is configured to transmit the second current.
    Type: Application
    Filed: December 14, 2022
    Publication date: May 2, 2024
    Inventors: Ming-Yao CHEN, Chang-Hung LI, Shin-Shueh CHEN, Jui-Chi LO
  • Publication number: 20240140554
    Abstract: Example front forks for bicycles are described herein. An example front fork includes a crown having a top side and a bottom side opposite the top side. The crown defines an opening between the top side and the bottom side. The front fork includes a first leg and a second leg coupled to and extending from the bottom side of the crown. The front fork also includes a steerer tube disposed in the opening of the crown and extending from the top side of the crown. The steerer tube and the crown coupled by a weld at or near the bottom side of the crown.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Applicant: SRAM, LLC
    Inventors: CHI HUI SU, HONG CHOU LEE, CHU CHEN WANG, EN-CHIEH CHEN
  • Publication number: 20240142869
    Abstract: Embodiments of the present disclosure generally relate to methods for enhancing carbon hardmask to have improved etching selectivity and profile control. In some embodiments, a method of treating a carbon hardmask layer is provided and includes positioning a workpiece within a process region of a processing chamber, where the workpiece has a carbon hardmask layer disposed on or over an underlying layer, and treating the carbon hardmask layer by exposing the workpiece to a sequential infiltration synthesis (SIS) process to produce an aluminum oxide carbon hybrid hardmask which is denser than the carbon hardmask layer. The SIS process includes exposing and infiltrating the carbon hardmask layer with an aluminum precursor, purging to remove gaseous remnants, exposing and infiltrating the carbon hardmask layer to an oxidizing agent to produce an aluminum oxide coating disposed on inner surfaces of the carbon hardmask layer, and purging the process region to remove gaseous remnants.
    Type: Application
    Filed: August 24, 2023
    Publication date: May 2, 2024
    Inventors: Yung-chen LIN, Zhiyu HUANG, Chi-I LANG, Ho-yung HWANG
  • Publication number: 20240142870
    Abstract: Embodiments of the present disclosure generally relate to methods for enhancing carbon hardmask to have improved etching selectivity and profile control. In some embodiments, a method of treating a carbon hardmask layer is provided and includes positioning a workpiece within a process region of a processing chamber, where the workpiece has a carbon hardmask layer disposed on or over an underlying layer, and treating the carbon hardmask layer by exposing the workpiece to a sequential infiltration synthesis (SIS) process to produce an aluminum oxide carbon hybrid hardmask which is denser than the carbon hardmask layer. The SIS process includes exposing and infiltrating the carbon hardmask layer with an aluminum precursor, purging to remove gaseous remnants, exposing and infiltrating the carbon hardmask layer to an oxidizing agent to produce an aluminum oxide coating disposed on inner surfaces of the carbon hardmask layer, and purging the process region to remove gaseous remnants.
    Type: Application
    Filed: August 24, 2023
    Publication date: May 2, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Yung-chen LIN, Zhiyu HUANG, Chi-I LANG, Ho-yung HWANG
  • Publication number: 20240143455
    Abstract: A virtual machine backup method, performed by a first host, includes: capturing a request to write data from a virtual machine to a hard disk image file, wherein the request includes written data and input and output location information, copying the written data to a temporary storage area, calculating a first key of the written data, storing the first key, the input and output location information into a first resource location structure, pausing an operation of the virtual machine and generating a second resource location structure according to the first resource location structure, the first key and a second key, and outputting a backup data set to a second host according to the second resource location structure, wherein the backup data set includes the second resource location structure and only one of existing data and the written data when the first key and the second key are the same.
    Type: Application
    Filed: May 15, 2023
    Publication date: May 2, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Lee Chung CHEN, Li Hao CHIANG, Gin CHI, Wei Jie HSU, Jiann Wen WANG, Wen Dwo HWANG
  • Patent number: 11969447
    Abstract: A composition for promoting defecation includes a cell culture of at least one lactic acid bacterial strain which is substantially free of cells. The least one lactic acid bacterial strain is selected from the group consisting of Lactobacillus salivarius subsp. salicinius AP-32, Bifidobacterium animalis subsp. lactis CP-9, and Lactobacillus acidophilus TYCA06, which are respectively deposited at the Bioresource Collection and Research Center (BCRC) under accession numbers BCRC 910437, BCRC 910645 and BCRC 910813. Also disclosed is a method for promoting defecation, including administering to a subject in need thereof an effective amount of the composition.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 30, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yi-Wei Kuo, Yu-Fen Huang, Cheng-Chi Lin
  • Patent number: 11972072
    Abstract: The present disclosure provides an electronic device including a first sensing circuit, a second sensing circuit and a power line. The first sensing circuit includes a first sensing unit and a first transistor, and a first end of the first sensing unit is coupled to a control end of the first transistor. The second sensing circuit includes a second sensing unit and a second transistor, and a first end of the second sensing unit is coupled to a control end of the second transistor. A first end of the first transistor and a first end of the second transistor are coupled to the power line.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: April 30, 2024
    Assignee: InnoLux Corporation
    Inventors: Shu-Fen Li, Chuan-Chi Chien, Hsiao-Feng Liao, Rui-An Yu, Chang-Chiang Cheng, Po-Yang Chen, I-An Yao
  • Patent number: 11971365
    Abstract: A wafer processing system and a rework method thereof are provided. An image capture device captures an image of a wafer to generate a captured image. A control device detects a defect pattern in the captured image, calculates a target removal thickness according to distribution of contrast values of the defect pattern, and controls a processing device to perform processing on the wafer according to the target removal thickness.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: April 30, 2024
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Shang-Chi Wang, Cheng-Jui Yang, Miao-Pei Chen, Han-Zong Wu
  • Patent number: 11971298
    Abstract: The present disclosure provides a sensing circuit, including a photo-sensing component, a first transistor, and a temperature-sensing component. The photo-sensing component is configured to receive a light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control circuit. The photo-sensing component and the first transistor are coupled in series between first and second nodes. The temperature-sensing component is coupled between the first and second nodes and is configured to generate a second current according to a temperature. The temperature-sensing component includes a channel structure, a first gate, a second gate, and a light-shielding structure. The channel structure is configured to transmit the second current.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: April 30, 2024
    Assignee: AUO CORPORATION
    Inventors: Ming-Yao Chen, Chang-Hung Li, Shin-Shueh Chen, Jui-Chi Lo
  • Patent number: 11970645
    Abstract: An anisotropic conductive adhesive, a display panel and a display device are provided. The anisotropic conductive adhesive includes an adhesive and a plurality of metal balls disposed in the adhesive. At least two annular grooves are defined by a surface of each of the metal balls.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: April 30, 2024
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Yicheng Chen, Chi Hu
  • Patent number: 11973302
    Abstract: The present disclosure provides a method for aligning a master oscillator power amplifier (MOPA) system. The method includes ramping up a pumping power input into a laser amplifier chain of the MOPA system until the pumping power input reaches an operational pumping power input level; adjusting a seed laser power output of a seed laser of the MOPA system until the seed laser power output is at a first level below an operational seed laser power output level; and performing a first optical alignment process to the MOPA system while the pumping power input is at the operational pumping power input level, the seed laser power output is at the first level, and the MOPA system reaches a steady operational thermal state.
    Type: Grant
    Filed: February 20, 2023
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Lin Louis Chang, Henry Tong Yee Shian, Alan Tu, Han-Lung Chang, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng