Patents by Inventor Chi-Chih Chen
Chi-Chih Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973164Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.Type: GrantFiled: January 3, 2023Date of Patent: April 30, 2024Assignee: EPISTAR CORPORATIONInventors: Che-Hung Lin, Chien-Chih Liao, Chi-Shiang Hsu, De-Shan Kuo, Chao-Hsing Chen
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Patent number: 11968856Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.Type: GrantFiled: October 4, 2021Date of Patent: April 23, 2024Assignee: Applied Materials, Inc.Inventors: Chung-Chih Wu, Po-Jui Chen, Hoang Yan Lin, Guo-Dong Su, Wei-Kai Lee, Chi-Jui Chang, Wan-Yu Lin, Byung Sung Kwak, Robert Jan Visser
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Patent number: 11967645Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a field plate, a gate electrode, and a first dielectric layer. The substrate has a top surface. The substrate includes a first drift region with a first conductivity type extending from the top surface of the substrate into the substrate, and includes a second drill region with the first conductivity type extending from the top surface of the substrate into the substrate and adjacent to the first drift region. The field plate is over the substrate. The gate electrode has a first portion and a second portion, wherein the first portion of the gate electrode is located over the field plate. The first dielectric layer is between the substrate and the field plate. The first portion of the gate electrode is overlapping with a boundary of the first drift region and the second drift region in the substrate.Type: GrantFiled: July 30, 2021Date of Patent: April 23, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
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Patent number: 11964881Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.Type: GrantFiled: July 27, 2020Date of Patent: April 23, 2024Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
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Patent number: 11967570Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.Type: GrantFiled: March 4, 2022Date of Patent: April 23, 2024Assignee: MediaTek Inc.Inventors: Chia-Hao Hsu, Tai-Yu Chen, Shiann-Tsong Tsai, Hsing-Chih Liu, Yao-Pang Hsu, Chi-Yuan Chen, Chung-Fa Lee
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Patent number: 11956994Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.Type: GrantFiled: August 10, 2021Date of Patent: April 9, 2024Assignee: Applied Materials, Inc.Inventors: Chung-Chih Wu, Hoang Yan Lin, Guo-Dong Su, Zih-Rou Cyue, Li-Yu Yu, Wei-Kai Lee, Guan-Yu Chen, Chung-Chia Chen, Wan-Yu Lin, Gang Yu, Byung-Sung Kwak, Robert Jan Visser, Chi-Jui Chang
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Publication number: 20240113187Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having one or more interior surfaces forming a recess within an upper surface of the substrate. Source/drain regions are disposed within the substrate on opposing sides of the recess. A first gate dielectric is arranged along the one or more interior surfaces forming the recess, and a second gate dielectric is arranged on the first gate dielectric and within the recess. A gate electrode is disposed on the second gate dielectric. The second gate dielectric includes one or more protrusions that extend outward from a recessed upper surface of the second gate dielectric and that are arranged along opposing sides of the second gate dielectric.Type: ApplicationFiled: January 5, 2023Publication date: April 4, 2024Inventors: Jhu-Min Song, Ying-Chou Chen, Yi-Kai Ciou, Chien-Chih Chou, Fei-Yun Chen, Yu-Chang Jong, Chi-Te Lin
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Publication number: 20240112924Abstract: An integrated circuit package including integrated circuit dies with slanted sidewalls and a method of forming are provided. The integrated circuit package may include a first integrated circuit die, a first gap-fill dielectric layer around the first integrated circuit die, a second integrated circuit die underneath the first integrated circuit die, and a second gap-fill dielectric layer around the second integrated circuit die. The first integrated circuit die may include a first substrate, wherein a first angle is between a first sidewall of the first substrate and a bottom surface of the first substrate, and a first interconnect structure on the bottom surface of the first substrate, wherein a second angle is between a first sidewall of the first interconnect structure and the bottom surface of the first substrate. The first angle may be larger than the second angle.Type: ApplicationFiled: January 5, 2023Publication date: April 4, 2024Inventors: Hsu-Hsien Chen, Chen-Shien Chen, Ting Hao Kuo, Chi-Yen Lin, Yu-Chih Huang
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Publication number: 20240102742Abstract: A liquid-cooled cooling structure includes a cooling main body having a condensation chamber and an evaporation chamber arranged vertically therein; a separation member arranged between and separating the condensation chamber and the evaporation chamber, and having a first through hole and a second through hole communicating with the condensation chamber and the evaporation chamber, a dimension of the first through hole being greater than that of the second through hole; a longitudinal partition board received in the condensation chamber and arranged between the first through hole and the second through hole and separating the condensation chamber into a first channel and a second channel; cooling fins extended from an outer perimeter of the cooling main body.Type: ApplicationFiled: September 25, 2022Publication date: March 28, 2024Inventors: Yen-Chih CHEN, Chi-Fu CHEN, Wei-Ta CHEN, Hung-Hui CHANG
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Patent number: 11888209Abstract: A multiband antenna comprises a dielectric substrate with a first surface defining an annular ledge and a central recess with a plurality of pockets. A MIMO radiator body is disposed in the central recess having a first surface defining a plurality of lobes which are disposed in respective ones of the plurality of pockets and having a second surface defining an outer rim and a central shelf A radiator ring is disposed at the annular ledge so that the radiator ring and the outer rim converge along an annular gap therebetween. A plurality of MIMO feed lines provide external connection to respective lobes. The MIMO radiator body and the radiator ring provide a substantially horizontally-directed radiation pattern (e.g., for terrestrial signals). At least one low-profile radiator on the central shelf provides a substantially circularly polarized or vertically-directed radiation pattern for receiving signals radiated from a satellite.Type: GrantFiled: November 8, 2022Date of Patent: January 30, 2024Assignees: FORD GLOBAL TECHNOLOGIES, LLC, OHIO STATE INNOVATION FOUNDATIONInventors: John F. Locke, Chi-Chih Chen, Jiukun Che
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Publication number: 20230314623Abstract: A system includes a navigation antenna configured to receive first satellite signals transmitted from a first type of satellite in a first frequency band and second satellite signals transmitted from a second type of satellite in a second frequency band and generate RHCP signal responses based on the first and second satellite signals, a plurality of science antennas configured to receive the first satellite signals in the first frequency band and the second satellite signals in the second frequency band as reflected from a ground surface and generate LHCP signal responses and RHCP signal responses based on the first and second satellite signals, and a receiver module including a processing module and a plurality of receivers coupled between the navigation antenna and the plurality of science antennas and the processing module. The processing module is configured to generate telemetry data based on the received LHCP and RHCP signal responses.Type: ApplicationFiled: March 31, 2023Publication date: October 5, 2023Applicants: THE REGENTS OF THE UNIVERSITY OF MICHIGAN, OHIO STATE INNOVATION FOUNDATIONInventors: Christopher RUF, Ryan P. MILLER, Timothy BUTLER, Andrew O'BRIEN, Chi-Chih CHEN
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Patent number: 11770583Abstract: A power-saving method for an HDMI device is provided. The method includes detecting color depth information of video data from an HDMI source which is connected to the HDMI port, deriving a horizontal length for each line by fragment of a picture frame according to the color depth information, generating a plurality of synchronization signals according to the horizontal length for each line by fragment, and powering on the HDMI port, according to the synchronization signals, for a predetermined time period to obtain encrypted information from the HDMI source, and powering off the HDMI port after the predetermined time period.Type: GrantFiled: July 21, 2022Date of Patent: September 26, 2023Assignee: MEDIATEK INC.Inventors: You-Tsai Jeng, Chia-Hao Chang, Yi-Cheng Chen, Kai-Wen Yeh, Kuo-Chang Cheng, Chi-Chih Chen, Szu-Hsiang Lai, Chin-Lung Lin, Kai-Wen Cheng, Te-Chuan Wang, Ko-Yin Lai, Keng-Lon Lei, Tai-Lai Tung
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Publication number: 20230075548Abstract: A multiband antenna comprises a dielectric substrate with a first surface defining an annular ledge and a central recess with a plurality of pockets. A MIMO radiator body is disposed in the central recess having a first surface defining a plurality of lobes which are disposed in respective ones of the plurality of pockets and having a second surface defining an outer rim and a central shelf A radiator ring is disposed at the annular ledge so that the radiator ring and the outer rim converge along an annular gap therebetween. A plurality of MIMO feed lines provide external connection to respective lobes. The MIMO radiator body and the radiator ring provide a substantially horizontally-directed radiation pattern (e.g., for terrestrial signals). At least one low-profile radiator on the central shelf provides a substantially circularly polarized or vertically-directed radiation pattern for receiving signals radiated from a satellite.Type: ApplicationFiled: November 8, 2022Publication date: March 9, 2023Inventors: John F. Locke, Chi-Chih Chen, Jiukun Che
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Patent number: 11527810Abstract: A multiband antenna comprises a dielectric substrate with a first surface defining an annular ledge and a central recess with a plurality of pockets. A MIMO radiator body is disposed in the central recess having a first surface defining a plurality of lobes which are disposed in respective ones of the plurality of pockets and having a second surface defining an outer rim and a central shelf. A radiator ring is disposed at the annular ledge so that the radiator ring and the outer rim converge along an annular gap therebetween. A plurality of MIMO feed lines provide external connection to respective lobes. The MIMO radiator body and the radiator ring provide a substantially horizontally-directed radiation pattern (e.g., for terrestrial signals). At least one low-profile radiator on the central shelf provides a substantially circularly polarized or vertically-directed radiation pattern for receiving signals radiated from a satellite.Type: GrantFiled: November 16, 2020Date of Patent: December 13, 2022Assignees: FORD GLOBAL TECHNOLOGIES, LLC, OHIO STATE INNOVATION FOUNDATIONInventors: John F. Locke, Chi-Chih Chen, Jiukun Che
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Publication number: 20220158325Abstract: A multiband antenna comprises a dielectric substrate with a first surface defining an annular ledge and a central recess with a plurality of pockets. A MIMO radiator body is disposed in the central recess having a first surface defining a plurality of lobes which are disposed in respective ones of the plurality of pockets and having a second surface defining an outer rim and a central shelf. A radiator ring is disposed at the annular ledge so that the radiator ring and the outer rim converge along an annular gap therebetween. A plurality of MIMO feed lines provide external connection to respective lobes. The MIMO radiator body and the radiator ring provide a substantially horizontally-directed radiation pattern (e.g., for terrestrial signals). At least one low-profile radiator on the central shelf provides a substantially circularly polarized or vertically-directed radiation pattern for receiving signals radiated from a satellite.Type: ApplicationFiled: November 16, 2020Publication date: May 19, 2022Inventors: John F. Locke, Chi-Chih Chen, Jiukun Che
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Patent number: 11205401Abstract: A power-saving method for switching High Definition Multimedia Interface (HDMI) ports on a sink device is provided. The sink device has a first HDMI port initially being enabled for displaying and a second HDMI port being disabled for displaying. The power-saving method includes the steps of using the reference signals to locate the VSYNC active edge in each frame generated by a source device connected to the second HDMI port; turning on the power to the second HDMI port during a power-on region corresponding to the VSYNC active edge in each frame and turning off power otherwise; obtaining information related to a high bandwidth digital content protection (HDCP) in the power-on region; and displaying video data from the source device based on the HDCP information when enabling the second HDMI port connected to the source device.Type: GrantFiled: April 28, 2021Date of Patent: December 21, 2021Assignee: MEDIATEK INC.Inventors: You-Tsai Jeng, Kai-Wen Cheng, Chin-Lung Lin, Yi-Cheng Chen, Te-Chuan Wang, Chi-Chih Chen, Szu-Hsiang Lai, Tai-Lai Tung, Keng-Lon Lei
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Publication number: 20210359129Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a field plate, a gate electrode, and a first dielectric layer. The substrate has a top surface. The substrate includes a first drift region with a first conductivity type extending from the top surface of the substrate into the substrate, and includes a second drill region with the first conductivity type extending from the top surface of the substrate into the substrate and adjacent to the first drift region. The field plate is over the substrate. The gate electrode has a first portion and a second portion, wherein the first portion of the gate electrode is located over the field plate. The first dielectric layer is between the substrate and the field plate. The first portion of the gate electrode is overlapping with a boundary of the first drift region and the second drift region in the substrate.Type: ApplicationFiled: July 30, 2021Publication date: November 18, 2021Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
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Patent number: 11088277Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: GrantFiled: May 19, 2020Date of Patent: August 10, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
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Publication number: 20200279948Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: ApplicationFiled: May 19, 2020Publication date: September 3, 2020Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
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Publication number: 20200251912Abstract: Systems and methods can include a transponder configured to communicate wirelessly with a receiver and sensor module (RSM), wirelessly communicate with a high-speed network, and radio-frequency (RF) powering of RSM. The high-speed network can include a wired network such as USB or Ethernet, or wireless network such as a Wi-Fi or cellular network. Additionally or alternatively, an antenna module can be configured to transmit radio-frequency (RF) power to a receiver configured to monitor a condition of a machine. A harmonic harvesting circuit design for harvesting unrectified AC power contained in the fundamental and harmonic at RF frequencies at the output of conventional rectifying circuits for storage and for powering of the entire RSM.Type: ApplicationFiled: April 9, 2020Publication date: August 6, 2020Applicants: Nikola Labs, Ohio State Innovation FoundationInventors: James Dvorsky, Chi-Chih Chen, Roland Kyle Tallos, Jonathan Eric Turner, Brock Joseph DeLong, Ryan Somogye