Abstract: A flying probe includes a test module and a processor. The test module measures a plurality of delta capacitances associated with a plurality of vias in a printed circuit board. The plurality of vias include first, second, third and fourth vias. Each different delta capacitance is measured between a different pair of the vias. The processor compares all the delta capacitances to a threshold value. In response to multiple delta capacitances associated with the first via being greater than or equal to the threshold value, the processor detects a possible via stripping issue for the first via.

Abstract: A packet processing system including an ingress unit, a detour launcher, a packet sequencer, a post-detour handler and an egress unit. The ingress unit is used to receive a packet. The detour launcher is used to detect a microburst according to at least a queue value and accordingly send the packet. The packet sequencer is used to attach a sequence number to the packet when the microburst emerges. The post-detoured handler is used to release the packet after the microburst has elapsed. The egress unit is used to output the packet processed by at least one member of a group consisting of the detour launcher, the packet sequencer and the post-detour handler.

Abstract: An electronic device includes a motherboard, a bridging device, and an add-in card. The motherboard includes a processor, a first circuit board, and a first connector. The processor is coupled to the first connector through the first circuit board. The bridging device includes a second circuit board and a second connector and is disposed on the motherboard and coupled to the first connector. The second connector is coupled to the first connector through the second circuit board. The add-in card includes a third circuit board and a peripheral circuit and is disposed on the bridging device and coupled to the second connector. The peripheral circuit is coupled to the second connector through the third circuit board. The processor is coupled to the peripheral circuit through a signal path including the first circuit board, the first connector, the second circuit board, the second connector, and the third circuit board.

Abstract: A packet processing system including an ingress unit, a detour launcher, a packet sequencer, a post-detour handler and an egress unit. The ingress unit is used to receive a packet. The detour launcher is used to detect a microburst according to at least a queue value and accordingly send the packet. The packet sequencer is used to attach a sequence number to the packet when the microburst emerges. The post-detoured handler is used to release the packet after the microburst has elapsed. The egress unit is used to output the packet processed by at least one member of a group consisting of the detour launcher, the packet sequencer and the post-detour handler.

Abstract: A signal testing device and a signal testing method are provided. The method includes: obtaining, through a probe, a first frequency response corresponding to a test fixture and a device under test (DUT); obtaining, through the probe, a second frequency response corresponding to the test fixture; and generating a frequency response corresponding to the DUT according to the first frequency response, the second frequency response, a de-embedding algorithm, and an empirical mode decomposition algorithm.

Abstract: An electronic device includes a motherboard, a bridging device, and an add-in card. The motherboard includes a processor, a first circuit board, and a first connector. The processor is coupled to the first connector through the first circuit board. The bridging device includes a second circuit board and a second connector and is disposed on the motherboard and coupled to the first connector. The second connector is coupled to the first connector through the second circuit board. The add-in card includes a third circuit board and a peripheral circuit and is disposed on the bridging device and coupled to the second connector. The peripheral circuit is coupled to the second connector through the third circuit board. The processor is coupled to the peripheral circuit through a signal path including the first circuit board, the first connector, the second circuit board, the second connector, and the third circuit board.

Abstract: A method for managing traffic item in software defined networking includes establishing a downlink flow table of a switch according to the flow entries, establishing an uplink flow table of the switch according to the flow entries, acquiring a data packet by the switch, and generating a transmission path to allocate the data packet according to the data packet, the downlink flow table, and the uplink flow table. The downlink flow table includes a correlation between first transmission ports of the switch and down link switches. The uplink flow table includes a correlation between the first transmission ports and a transmission port group of uplink switches.

Abstract: A replacing device for a laminated manufacturing platform is provided. The replacing device has a box, a carrying body, and a lifting mechanism. The box includes two slides. The carrying body can slide on the slide and be replaced by another carrying body. Thus, problems that a working platform of a laminated manufacturing equipment is not moved, workpieces are not automatically produced and the workpieces are not synchronously replaced can be effectively solved.

Abstract: A method includes a switch of the software defined networking analyzing a header of a package to retrieve at least one related rule field when the switch receives the package, selecting a related flow table according to the at least one related rule field and a plurality of interested rule fields of a plurality of flow tables in the switch, and matching the rule content corresponding to at least one flow entry in the related flow table with the content of the at least one related rule field. The at least one flow entry has the same interested rule field and the at least one related rule field includes the interested rule field of the related flow table.

Abstract: A method for managing traffic item in software defined networking includes establishing a downlink flow table of a switch according to the flow entries, establishing an uplink flow table of the switch according to the flow entries, acquiring a data packet by the switch, and generating a transmission path to allocate the data packet according to the data packet, the downlink flow table, and the uplink flow table. The downlink flow table includes a correlation between first transmission ports of the switch and down link switches. The uplink flow table includes a correlation between the first transmission ports and a transmission port group of uplink switches.

Abstract: A method of accessing data for a switch includes vectorizing a flow entry to generate a flow entry vector, matching the flow entry vector and a stored vector of each first memory of a plurality of first memories for selecting a buffer address of the flow entry vector, and moving partial data of a first memory to a second memory when the first memory is selected to store the flow entry vector and a utilization rate of the first memory is greater than a predetermined value.

Abstract: A data programming method for a data programming device having a non-volatile memory and a volatile memory, the method comprising determining whether data exceeds one page; if the data does not exceed one page and is insufficient for one page, storing the data into the volatile memory; determining whether next data is to be programmed into the same page as the data stored in the volatile memory; if the next data is to be programmed into the same page as the data stored in the volatile memory, programming the data and the next data into the non-volatile memory.

Abstract: A method for accessing a flash memory includes: writing a data stream into at least a page of at least one data block of the flash memory, where each page of the data block includes an identity code; reading at least one identity code of the page; and determining a specific page according to at least the identity code, where the specific page is a last page that the data stream is written to before the flash memory is disconnected from a power source.

Abstract: Methods and devices capable of erasing a flash memory evenly are provided, in which a flash memory comprises a data region with a plurality of data blocks and a spare region with a plurality of spare blocks, and a controller retrieves a corresponding data with a check code from a first data block of the flash memory according to a read command from a host, performs a predetermined check to the corresponding data by the check code, determines whether an error is correctable when a check result of the predetermined check represents that the error has occurred, and increases an erase count of the first data block by a predetermined value when the error is correctable.

Abstract: A data programming method for a data programming device having a non-volatile memory and a volatile memory, the method comprising determining whether data exceeds one page; if the data does not exceed one page and is insufficient for one page, storing the data into the volatile memory; determining whether next data is to be programmed into the same page as the data stored in the volatile memory; if the next data is to be programmed into the same page as the data stored in the volatile memory, programming the data and the next data into the non-volatile memory.

Abstract: A data programming device is provided and comprises a non-volatile memory, a volatile memory, and a memory control unit. The non-volatile memory is arranged for programming data. The volatile memory is arranged for temporarily storing data. The memory control unit is arranged for receiving data and determining whether the data is programmed into the non-volatile memory or stored into the volatile memory. If the data exceeds one page, the memory control unit programs a first portion of the data into the non-volatile memory and stores a second portion of the data, which is insufficient for one page, into the volatile memory.

Abstract: A non-volatile memory apparatus and a method for accessing the non-volatile memory apparatus are provided. The non-volatile memory apparatus comprises a management unit, a look-up table and a controller. The management unit comprises a plurality of data blocks and a plurality of spare blocks. The look-up table is adapted to record the read status of the management unit. The controller is configured to read the management unit and then generate the read status denoting the times that the management unit has been read to the look-up table, and to replace one of the data blocks by one of the spare blocks in response to the read status when the times that the management unit has been read exceeds a reference value.

Abstract: A method for handling data updating of a flash memory is disclosed, in which the flash memory comprises a mother block with a plurality of pages to be updated, and each page comprises a plurality of sectors. In such method, a first data for updating a target page in the mother block is obtained, and then whether the first data comprises data for updating an ending sector in the target page is determined. The first data is written into a replacing page in a first FAT block when the first data does not comprise data for updating the ending sector in the target page. The first data is written into a corresponding page in a second FAT block when the first data comprises the data for updating the ending sector, in which the corresponding page in the second FAT block and the target page in the mother block have the same page indexes.

Abstract: A coating structure includes a UV-cured resin layer and a fluoride monomolecular layer. Organosilicon groups of organosilicon molecules extend from the surface of the resin layer. Wax fine powder and oxide nanoparticles emerge from the surface of the resin layer to form mountain-valley-like microstructures. Fluoride molecules of the fluoride monomolecular layer are chemically bonded with the surface of the resin layer to expose the fluoride groups. During the formation of the coating structure, the UV-curable resin layer is first partially cured, then the fluoride molecules are activated to chemically bond to the surface of the resin layer, and thereafter, the UV-curable resin layer is completely cured.

Abstract: A coating structure includes a UV-cured resin layer and a fluoride monomolecular layer. Organosilicon groups of organosilicon molecules extend from the surface of the resin layer. Wax fine powder and oxide nanoparticles emerge from the surface of the resin layer to form mountain-valley-like microstructures. Fluoride molecules of the fluoride monomolecular layer are chemically bonded with the surface of the resin layer to expose the fluoride groups. During the formation of the coating structure, the UV-curable resin layer is first partially cured, then the fluoride molecules are activated to chemically bond to the surface of the resin layer, and thereafter, the UV-curable resin layer is completely cured.