Patents by Inventor Chi-Hsiung Cheng

Chi-Hsiung Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11983475
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
  • Publication number: 20230106022
    Abstract: A display control integrated circuit (IC) applicable to performing video output (VO) generator reset control in a display device includes multiple sub-circuits such as a VO generator and a display output control circuit. The VO generator generates an input vertical synchronization (IVS) signal for controlling playback of video data. The display output control circuit performs display output control, and more particularly, generates a set of display control signals to control a display output module within the display device to perform display operations. The set of display control signals may include a display vertical synchronization (DVS) signal for being used as timing reference of a timing controller within the display output module. During a time interval between time points when two consecutive pulses carried by the DVS signal appear, the display output control circuit sends a reset signal to the VO generator at an intermediate time point to reset it.
    Type: Application
    Filed: March 15, 2022
    Publication date: April 6, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventors: Hsueh-Ping Wang, Chi-Hsiung Cheng
  • Patent number: 10659725
    Abstract: The present invention discloses an image processing device and an image processing method. The image processing method includes steps of: referring to multiple frames or an auxiliary data associated with the frames to determine whether the frames contain substantially the same frames; selecting the frames according to whether the frames contain substantially the same frames to generate multiple selected frames; and performing video processing on the selected frames. When the frames do not contain substantially the same frames, the selected frames are the same as the frames, and when the frames contain substantially the same frames, the selected frames are part of the frames.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: May 19, 2020
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chia-Wei Yu, Cheng-Hsin Chang, Chun-Hsing Hsieh, Chi-Hsiung Cheng
  • Publication number: 20190289256
    Abstract: The present invention discloses an image processing device and an image processing method. The image processing method includes steps of: referring to multiple frames or an auxiliary data associated with the frames to determine whether the frames contain substantially the same frames; selecting the frames according to whether the frames contain substantially the same frames to generate multiple selected frames; and performing video processing on the selected frames. When the frames do not contain substantially the same frames, the selected frames are the same as the frames, and when the frames contain substantially the same frames, the selected frames are part of the frames.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 19, 2019
    Inventors: CHIA-WEI YU, CHENG-HSIN CHANG, CHUN-HSING HSIEH, CHI-HSIUNG CHENG
  • Patent number: 8055890
    Abstract: The present invention provides a data recovery method in a system with storage of default values and prior configuration values, including executing initialization of the system; loading the default values; detecting a status of a first flag to generate a first detection result; and, determining whether a boot-up sequence is complete according to the first detection result.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: November 8, 2011
    Assignee: Realtek Semiconductor Corp.
    Inventors: Kuo-Hao Yu, Chi-Hsiung Cheng
  • Patent number: 8052035
    Abstract: A method for forming solder bodies on a substrate includes: positioning a first mask plate, which is formed with at least one first through-hole, on the substrate; filling the first through-hole with a first solder paste so as to form a first solder body on the substrate; positioning a second mask plate, which is formed with at least one second through-hole and at least one recess spaced apart from the second through-hole, on the substrate in such a manner that the first solder body is received in the recess; and filling the second through-hole with a second solder paste so as to form a second solder body on the substrate.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: November 8, 2011
    Assignees: Universal Scientific Industrial (Shanghai) Co., Ltd., Universal Global Scientific Industrial Co., Ltd.
    Inventors: Chi-Hsiung Cheng, Wan-Chen Chan, Hsun-Fa Li
  • Publication number: 20090022928
    Abstract: A method for forming solder bodies on a substrate includes: positioning a first mask plate, which is formed with at least one first through-hole, on the substrate; filling the first through-hole with a first solder paste so as to form a first solder body on the substrate; positioning a second mask plate, which is formed with at least one second through-hole and at least one recess spaced apart from the second through-hole, on the substrate in such a manner that the first solder body is received in the recess; and filling the second through-hole with a second solder paste so as to form a second solder body on the substrate.
    Type: Application
    Filed: September 10, 2007
    Publication date: January 22, 2009
    Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL CO., LTD.
    Inventors: Chi-Hsiung Cheng, Wan-Chen Chan, Hsun-Fa Li
  • Publication number: 20080313451
    Abstract: The present invention provides a data recovery method in a system with storage of default values and prior configuration values, including executing initialization of the system; loading the default values; detecting a status of a first flag to generate a first detection result; and, determining whether a boot-up sequence is complete according to the first detection result.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 18, 2008
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Kuo-Hao Yu, Chi-Hsiung Cheng