Patents by Inventor Chi-Hwang Tai

Chi-Hwang Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11043482
    Abstract: A package manufacturing having a semiconductor substrate, a bonding layer, at least one semiconductor device, a redistribution circuit structure and an insulating encapsulation. The bonding layer is disposed on the semiconductor substrate. The semiconductor device is disposed on and in contact with a portion of the bonding layer, wherein the bonding layer is located between the semiconductor substrate and the semiconductor device and adheres the semiconductor device onto the semiconductor substrate. The redistribution circuit structure is disposed on and electrically connected to the semiconductor device, wherein the semiconductor device is located between the redistribution circuit structure and the bonding layer. The insulating encapsulation wraps a sidewall of the semiconductor device, wherein a sidewall of the bonding layer is aligned with a sidewall of the insulating encapsulation and a sidewall of the redistribution circuit structure.
    Type: Grant
    Filed: May 31, 2020
    Date of Patent: June 22, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Hsien-Wei Chen, Sung-Feng Yeh, Chi-Hwang Tai
  • Publication number: 20200294984
    Abstract: A package manufacturing having a semiconductor substrate, a bonding layer, at least one semiconductor device, a redistribution circuit structure and an insulating encapsulation. The bonding layer is disposed on the semiconductor substrate. The semiconductor device is disposed on and in contact with a portion of the bonding layer, wherein the bonding layer is located between the semiconductor substrate and the semiconductor device and adheres the semiconductor device onto the semiconductor substrate. The redistribution circuit structure is disposed on and electrically connected to the semiconductor device, wherein the semiconductor device is located between the redistribution circuit structure and the bonding layer. The insulating encapsulation wraps a sidewall of the semiconductor device, wherein a sidewall of the bonding layer is aligned with a sidewall of the insulating encapsulation and a sidewall of the redistribution circuit structure.
    Type: Application
    Filed: May 31, 2020
    Publication date: September 17, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Fa Chen, Hsien-Wei Chen, Sung-Feng Yeh, Chi-Hwang Tai
  • Patent number: 10672754
    Abstract: A package manufacturing having a semiconductor substrate, a bonding layer, at least one semiconductor device, a redistribution circuit structure and an insulating encapsulation. The bonding layer is disposed on the semiconductor substrate. The semiconductor device is disposed on and in contact with a portion of the bonding layer, wherein the bonding layer is located between the semiconductor substrate and the semiconductor device and adheres the semiconductor device onto the semiconductor substrate. The redistribution circuit structure is disposed on and electrically connected to the semiconductor device, wherein the semiconductor device is located between the redistribution circuit structure and the bonding layer. The insulating encapsulation wraps a sidewall of the semiconductor device, wherein a sidewall of the bonding layer is aligned with a sidewall of the insulating encapsulation and a sidewall of the redistribution circuit structure.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Fa Chen, Hsien-Wei Chen, Sung-Feng Yeh, Chi-Hwang Tai
  • Publication number: 20190312022
    Abstract: A package manufacturing having a semiconductor substrate, a bonding layer, at least one semiconductor device, a redistribution circuit structure and an insulating encapsulation. The bonding layer is disposed on the semiconductor substrate. The semiconductor device is disposed on and in contact with a portion of the bonding layer, wherein the bonding layer is located between the semiconductor substrate and the semiconductor device and adheres the semiconductor device onto the semiconductor substrate. The redistribution circuit structure is disposed on and electrically connected to the semiconductor device, wherein the semiconductor device is located between the redistribution circuit structure and the bonding layer. The insulating encapsulation wraps a sidewall of the semiconductor device, wherein a sidewall of the bonding layer is aligned with a sidewall of the insulating encapsulation and a sidewall of the redistribution circuit structure.
    Type: Application
    Filed: June 10, 2019
    Publication date: October 10, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Fa Chen, Hsien-Wei Chen, Sung-Feng Yeh, Chi-Hwang Tai
  • Patent number: 10319707
    Abstract: A package manufacturing having a semiconductor substrate, a bonding layer, at least one semiconductor device, a redistribution circuit structure and an insulating encapsulation. The bonding layer is disposed on the semiconductor substrate. The at least one semiconductor device is disposed on and in contact with a portion of the bonding layer, wherein the bonding layer is located between the semiconductor substrate and the at least one semiconductor device and adheres the at least one semiconductor device onto the semiconductor substrate. The redistribution circuit structure is disposed on and electrically connected to the at least one semiconductor device, wherein the at least one semiconductor device is located between the redistribution circuit structure and the bonding layer.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: June 11, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Fa Chen, Hsien-Wei Chen, Sung-Feng Yeh, Chi-Hwang Tai
  • Publication number: 20190096867
    Abstract: A package manufacturing having a semiconductor substrate, a bonding layer, at least one semiconductor device, a redistribution circuit structure and an insulating encapsulation. The bonding layer is disposed on the semiconductor substrate. The at least one semiconductor device is disposed on and in contact with a portion of the bonding layer, wherein the bonding layer is located between the semiconductor substrate and the at least one semiconductor device and adheres the at least one semiconductor device onto the semiconductor substrate. The redistribution circuit structure is disposed on and electrically connected to the at least one semiconductor device, wherein the at least one semiconductor device is located between the redistribution circuit structure and the bonding layer.
    Type: Application
    Filed: September 27, 2017
    Publication date: March 28, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Fa Chen, Hsien-Wei Chen, Sung-Feng Yeh, Chi-Hwang Tai