Patents by Inventor Chi Keun Vincent Leung

Chi Keun Vincent Leung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • BONDING METHOD FOR THROUGH-SILICON-VIA BASED 3D WAFER STACKING
    Publication number: 20090294974
    Abstract: There is described a bonding method for through-silicon-via bonding of a wafer stack in which the wafers are formed with through-silicon-vias and lateral microchannels that are filled with solder. To fill the vias and channels the wafer stack is placed in a soldering chamber and molten solder is drawn through the vias and channels by vacuum. The wafers are held together by layers of adhesive during the assembly of the wafer stack. Means are provided for local reheating of the solder after it has cooled to soften the solder to enable it to be removed from the soldering chamber.
    Type: Application
    Filed: June 2, 2008
    Publication date: December 3, 2009
    Inventors: Chi Keun Vincent Leung, Peng Sun, Xunqing Shi, Chang Hwa Chung