Patents by Inventor Chi Lee

Chi Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240187544
    Abstract: A target tracking system includes an observation module, a dynamic tracking module, a control module and an aiming module. The observation module captures an observation frame including a tracked-object image of a tracked-object and an aiming point image and detects a distance between the observation module and the tracked-object. The dynamic tracking module analyzes the observation frame to obtain a lag correction vector between the aiming point image and the tracked-object image, and obtains a feed-forward correction vector according to the lag correction vector and the distance. The control module generates a control command representing the lag correction vector and a control command representing the feed-forward correction vector. The aiming module moves according to the control commands to control the aiming point image to align with the tracked-object image and control the aiming point image to lead the tracked-object image.
    Type: Application
    Filed: December 27, 2022
    Publication date: June 6, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chung-Wei CHANG, Yi-Ling LEE, Chia-Jung LIU, Yin-Ling KUO, Feng-Chi LI
  • Publication number: 20240175836
    Abstract: A gas detector includes: a substrate, a heater, a first resistor and a second resistor. The heater is disposed on the substrate. The first resistor is disposed on the heater, and has a first resistance value associated with a target gas. The second resistor is connected in series with the first resistor and is disposed on the substrate, wherein the first resistor and the second resistor are formed in the same manufacturing process and in the same shape.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 30, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Chi KUO, Bor-Shiun LEE, Ming-Fa CHEN
  • Publication number: 20240178059
    Abstract: A structure includes a first conductive feature, a first etch stop layer over the first conductive feature, a dielectric layer over the first etch stop layer, and a second conductive feature in the dielectric layer and the first etch stop layer. The second conductive feature is over and contacting the first conductive feature. An air spacer encircles the second conductive feature, and sidewalls of the second conductive feature are exposed to the air spacer. A protection ring further encircles the second conductive feature, and the protection ring fully separates the second conductive feature from the air spacer.
    Type: Application
    Filed: February 2, 2024
    Publication date: May 30, 2024
    Inventors: Chia Cheng Chou, Chung-Chi Ko, Tze-Liang Lee
  • Patent number: 11996428
    Abstract: An image sensor includes an array of image pixels and black level correction (BLC) pixels. Each BLC pixel includes a BLC pixel photodetector, a BLC pixel sensing circuit, and a BLC pixel optics assembly configured to block light that impinges onto the BLC pixel photodetector. Each BLC pixel optics assembly may include a first portion of a layer stack including a vertically alternating sequence of first material layers having a first refractive index and second material layers having a second refractive index. Additionally or alternatively, each BLC pixel optics assembly may include a first portion of a layer stack including at least two metal layers, each having a respective wavelength sub-range having a greater reflectivity than another metal layer. Alternatively or additionally, each BLC pixel optics assembly may include an infrared blocking material layer that provides a higher absorption coefficient than color filter materials within image pixel optics assemblies.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: May 28, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Hsin-Chi Chen
  • Patent number: 11993783
    Abstract: Described herein is a nucleic acid molecule including an asymmetrically modified inverted terminal repeat (ITR). An AAV vector including the nucleic acid molecule has advantages of increased productivity and expression efficiency of a transgene, and decreased genotoxicity, by having an asymmetric ITR in which any one of two ITRs is modified. Also, described herein is are compositions and vectors.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: May 28, 2024
    Assignee: GENECRAFT INC.
    Inventors: Suk Chul Bae, You Soub Lee, Xinzi Chi, Seo Yeong Yoo, Woo-Jin Kim
  • Publication number: 20240172434
    Abstract: A semiconductor device includes a stacked gate structure, a plurality of stacks and a first conductive layer. The stacks are disposed aside the stacked gate structure and arranged along both a first direction and a second direction perpendicular to the first direction, wherein the stacks are extended continuously along the first direction and segmented in the second direction. The first conductive layer is disposed between segmented portions of the stacks along the second direction, wherein top surfaces of the segmented portions of the stacks are higher than a top surface of the first conductive layer.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Publication number: 20240172153
    Abstract: A method of preventing a timing loop and a network device are provided. The method of preventing the timing loop includes receiving a source synchronization packet by a network device; retrieving key data of the source synchronization packet; determining whether the key data of the source synchronization packet includes an identifier of the network device if the network device is determined including at least two inputs and one output; generating a local synchronization packet and adding the identifier of the network device to the key data of the local synchronization packet when determining that the key data of the source synchronization packet does not include the identifier; and, sending the local synchronization packet through the output.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 23, 2024
    Inventors: Lokesh SHARMA, Ching-Chun LEE, Yu-Chi HUI
  • Publication number: 20240172361
    Abstract: An electronic device is provided. The electronic device includes a substrate structure, a control unit, a first circuit structure, and an electronic unit. The substrate structure has a conductive via pattern and a dummy via pattern. The control unit is electrically connected to the conductive via pattern. The first circuit structure is electrically connected to the conductive via pattern. The electronic unit is electrically connected to the control unit through the first circuit structure. The dummy via pattern is electrically insulated from the first circuit structure.
    Type: Application
    Filed: December 19, 2022
    Publication date: May 23, 2024
    Inventors: Cheng-Chi WANG, Kuan-Feng LEE, Jui-Jen YUEH
  • Patent number: 11991174
    Abstract: An authentication system with an automatic authentication mechanism and an automatic authentication method are provided. The authentication system includes a server device and a gateway device. The gateway device is coupled to the server device. The gateway device is configured to act as a fast identity online (FIDO) client to send a gateway device registration data to register the gateway device in the server device acting as a FIDO server, and then the gateway device defines itself as initialized and connected. The gateway device periodically sends data to server device for authentication to maintain a trusted connection between the server device and the gateway device.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: May 21, 2024
    Assignee: GoTrustID Inc.
    Inventors: Darren Tien-Chi Lee, Jeng-Lung Li, Ramesh Kesanupalli
  • Patent number: 11991827
    Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: May 21, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chun-Yen Ting, Pao-Nan Lee, Hung-Chun Kuo, Jung Jui Kang, Chang Chi Lee
  • Patent number: 11991436
    Abstract: A driving mechanism is provided, including a base, a movable unit, and a movable part. The movable unit is movably disposed on the base and connected to an optical element. The movable part is movably disposed on the base and forms a passage. When the movable part moves from the first position to the second position relative to the base, the movable unit can slide relative to the base from its initial position through the passage to a closed position.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: May 21, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Hsi Wang, Yu-Chi Kuo, Xuan-Huan Su, Yueh-Lin Lee
  • Publication number: 20240158309
    Abstract: The invention provides a material surface treatment equipment, which is applied to a material substrate. The material surface treatment equipment includes a surface treatment device and at least one waveguide device. The surface treatment device is used to carry the material substrate to perform a surface treatment process. Each waveguide device is used for introducing electromagnetic waves to the material substrate to assist in performing the surface treatment process. Through the introduction of electromagnetic waves, the surface treatment process of the material substrate is easy to perform and can achieve the strengthening effect.
    Type: Application
    Filed: December 15, 2022
    Publication date: May 16, 2024
    Inventors: TIEN-HSI LEE, JUN-HUANG WU, YU-SHENG CHIOU, SHU-CHENG LI, WEI-CHI HUANG, HSIN CHEN
  • Publication number: 20240157614
    Abstract: Proposed are an apparatus and a method for expanded polypropylene (EPP) molding. The apparatus for EPP molding includes an upper mold, a lower mold forming a cavity, which is a space for manufacturing a molded product, together with the upper mold, a skin holding means provided at the upper mold or the lower mold, an insert holding means provided at one of the upper mold and the lower mold where the skin holding means is not provided, a resin supply means supplying a polypropylene resin to the cavity, a heating means applying heat to the polypropylene resin supplied to the cavity, and a mold driving means moving the upper mold and the lower mold in directions towards or away from each other.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 16, 2024
    Inventors: Chi Won YOON, Hyeok LEE
  • Patent number: 11984314
    Abstract: A particle removal method for removing particles on the backside of a reticle is provided. The method includes disposing the reticle on a reticle holder. In addition, the method includes moving a baffle defining an enclosed area that encompasses a particle to be removed on a backside of the reticle. The method further includes spraying, by a solution spraying module of a particle removal device, a solution onto the particle. The method further includes sucking, by a sucking module of the particle removal device, the solution on the reticle with the particle. The method further includes emitting, by the particle removal device, a gas onto the backside of the reticle for drying the backside.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Siao-Chian Huang, Po-Chung Cheng, Ching-Juinn Huang, Tzung-Chi Fu, Tsung-Yen Lee
  • Patent number: 11982944
    Abstract: A method of lithography process is provided. The method includes forming a conductive layer over a reticle. The method includes applying ionized particles to the reticle by a discharging device. The method includes forming a photoresist layer over a semiconductor substrate. The method includes securing the semiconductor substrate by a wafer electrostatic-clamp. The method also includes patterning the photoresist layer by emitting radiation from a radiation source via the reticle.
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Lun Chang, Chueh-Chi Kuo, Tsung-Yen Lee, Tzung-Chi Fu, Li-Jui Chen, Po-Chung Cheng, Che-Chang Hsu
  • Publication number: 20240155758
    Abstract: An electronic device is provided. The electronic device includes a first dielectric layer, an electronic element, an encapsulant, and a second dielectric layer. The first dielectric layer has a first coefficient of thermal expansion (CTE). The electronic element is disposed over the first dielectric layer. The encapsulant encapsulates the electronic element and has a second CTE. The second dielectric layer is disposed over the encapsulant and having a third CTE. The second CTE ranges between the first CTE and the third CTE.
    Type: Application
    Filed: November 4, 2022
    Publication date: May 9, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien Lin CHANG CHIEN, Yuan-Chun TAI, Yu Hsin CHANG CHIEN, Chiu-Wen LEE, Chang Chi LEE
  • Publication number: 20240151686
    Abstract: A method of fabricating a semiconductor device for sensing biological material includes: forming a field-effect transistor (FET) on a semiconductor substrate that includes a gate; forming a well within a material disposed over the semiconductor substrate, the well having an opening at a first end and a floor at second end, the well further having one or more side walls extending from the floor toward the opening to define an open-ended cavity into which a fluid may be flowed; forming a via extending through the floor such that an end-most surface of the via resides proud of the floor in a direction of the well's opening, the via being electrically coupled to the gate; and forming a sensing layer that at least partially covers the floor and a portion of the via residing proud of the floor, the sensing layer being reactive to exposure to a biological material.
    Type: Application
    Filed: January 4, 2023
    Publication date: May 9, 2024
    Inventors: Chuan-Chi Yan, Yueh-Chuan Lee, Chia-Chan Chen
  • Publication number: 20240153541
    Abstract: Some embodiments include an integrated assembly having first and second source/drain regions laterally offset from one another. Metal silicide is adjacent to lateral surfaces of the source/drain regions. Metal is adjacent to the metal silicide. Container-shaped first and second capacitor electrodes are coupled to the source/drain regions through the metal silicide and the metal. Capacitor dielectric material lines interior surfaces of the container-shaped first and second capacitor electrodes, A shared capacitor electrode extends vertically between the first and second capacitor electrodes, and extends into the lined first and second capacitor electrodes. Some embodiments include methods of forming integrated assemblies.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 9, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Che-Chi Lee, Terrence B. McDaniel, Kehao Zhang, Albert P. Chan, Clement Jacob, Luca Fumagalli, Vinay Nair
  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Publication number: 20240136463
    Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 25, 2024
    Applicant: EPISTAR CORPORATION
    Inventors: Yi-Chieh LIN, Shiuan-Leh LIN, Yung-Fu CHANG, Shih-Chang LEE, Chia-Liang HSU, Yi HSIAO, Wen-Luh LIAO, Hong-Chi SHIH, Mei-Chun LIU