Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a first light-emitting diode (LED) layer including a first LED of a first color type, the first LED layer having a first side and a second side opposite to the first side; a second LED layer over the first LED layer, the second LED layer including a second LED of a second color type, and the second LED layer having a first side and a second side opposite to the first side; and a third LED layer over the second LED layer, the third LED layer including a third LED of a third color type, and the third LED layer having a first side and a second side opposite to the first side; wherein the first color type, the second color type, and the third color type are different from each other.

Abstract: Some embodiments of the present disclosure relate to a HEMT. The HEMT includes a heterojunction structure having a second III/V semiconductor layer arranged over a first III/V semiconductor layer. Source and drain regions are arranged over the substrate and spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and arranged between the source and drain regions. A first passivation layer is disposed about sidewalls of the gate structure and extending over an upper surface of the gate structure, wherein the first passivation layer is made of a III-V material. A second passivation layer overlies the first passivation layer and made of a material composition different from a material composition of the first passivation layer. The second passivation layer has a thickness greater than that of the first passivation layer.

Abstract: A semiconductor device includes a substrate. The semiconductor device includes an AlN seed layer in direct contact with the substrate. The AlN seed layer includes an AlN first seed sublayer, and an AlN second seed sublayer, wherein a portion of the AlN seed layer closest to the substrate includes carbon dopants and has a different lattice structure from a substrate lattice structure. The semiconductor device includes a graded layer in direct contact with the AlN seed layer. The graded layer includes a first graded sublayer including AlGaN, a second graded sublayer including AlGaN, and a third graded sublayer including AlGaN. The semiconductor device includes a channel layer over the graded layer. The semiconductor device includes an active layer over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer.

Abstract: Various embodiments of the present application are directed towards a group III-V device including a seed buffer layer that is doped and that is directly on a silicon substrate. In some embodiments, the group III-V device includes the silicon substrate, the seed buffer layer, a heterojunction structure, a pair of source/drain electrodes, and a gate electrode. The seed buffer layer overlies and directly contacts the silicon substrate. Further, the seed buffer layer includes a group III nitride (e.g., AlN) that is doped with p-type dopants. The heterojunction structure overlies the seed buffer layer. The source/drain electrodes overlie the heterojunction structure. The gate electrode overlies the heterojunction structure, laterally between the source/drain electrodes. The p-type dopants prevent the formation of a two-dimensional hole gas (2DHG) in the silicon substrate, along an interface at which the silicon substrate and the seed buffer layer directly contact.

Abstract: Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a first III/V semiconductor layer, and a second III/V semiconductor layer arranged over the first III/V semiconductor layer. Source and drain regions are arranged over the second III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.

Abstract: A cable connector includes a first plug, a second plug opposite the first plug, a cable connected with the first plug and second plug, and a LED light located in the first plug or the second plug, wherein the cable is provided with a braid layer located at the outermost side of the cable, the braid layer is composed of metal enameled wire mixed fibers, and the cable causes the LED light to be illuminated by capacitive sensing through proximity.

Abstract: A semiconductor device includes a substrate, and a seed layer over the substrate, wherein the seed layer comprises carbon dopants. The semiconductor device further includes a channel layer over the seed layer, and an active layer over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer. A method of making a transistor includes forming a seed layer over a substrate, and doping the seed layer, wherein doping the seed layer comprises introducing carbon dopants into the seed layer. The method further includes forming a channel layer over the seed layer, and forming an active layer over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer.

Abstract: The semiconductor structure includes a p-type doped III-V compound layer, a III-V compound channel layer over the p-type doped III-V compound layer, and a barrier layer. The III-V compound channel layer includes an upper region and a lower region, and the barrier layer is sandwiched between the upper region and the lower region of the III-V channel compound layer. The III-V compound channel layer includes a first band gap, the barrier layer includes a second band gap, and the second band gap is greater than the first band gap.

Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor structure, a dielectric layer, a metal-semiconductor compound film and a cover layer. The semiconductor structure has an upper surface and a lateral surface. The dielectric layer encloses the lateral surface of the semiconductor structure and exposes the upper surface of the semiconductor structure. The metal-semiconductor compound film is on the semiconductor structure, wherein the dielectric layer exposes a portion of a surface of the metal-semiconductor compound film. The cover layer encloses the portion of the surface of the metal-semiconductor compound film exposed by the dielectric layer, and exposes the dielectric layer.

Abstract: A processing unit performs multiply-and-accumulate (MAC) operations on asymmetrically quantized data. The processing unit includes a MAC hardware unit to perform the MAC operations on a first data sequence and a second data sequence to generate an asymmetric MAC output. Both the first data sequence and the second data sequence are asymmetrically quantized. The processing unit further includes an accumulator hardware unit to accumulate the first data sequence concurrently with the MAC operations to generate an accumulated output. The processing unit further includes a multiply-and-add (MAD) hardware unit to multiply the accumulated output with a second offset to generate a multiplication output, and to add the multiplication output, the asymmetric MAC output and a pre-computed value calculated before runtime to generate a final output. The second offset indicates an amount of asymmetry of the second data sequence with respect to zero.

Abstract: An LED lamp and a component, a heat dissipating base and an LED wireless dimming system thereof are provided. The LED lamp component comprises a heat dissipating base, a light emitting module and a lens, the heat dissipating base has a bearing surface and a back surface opposite to the bearing surface, the bearing surface is provided with a first recessed section therein, the back surface is provided with heat dissipating structures; the heat dissipating base further comprises a first joint portion; the light emitting module is disposed in the first recessed section, and the lens covering the light emitting module.

Abstract: A cable connector includes a first plug, a second plug opposite the first plug, a cable connected with the first plug and second plug, and a LED light located in the first plug or the second plug, wherein the cable is provided with a braid layer located at the outermost side of the cable, the braid layer is composed of metal enameled wire mixed fibers, and the cable causes the LED light to be illuminated by capacitive sensing through proximity.

Abstract: A lock set transmission mechanism includes a lock case, a lock core, a transmission rod, a supporting member and a fixing member. The lock core is arranged on the lock case and configured to be driven by a key to rotate relative to the lock case. The transmission rod has a first end configured to be connected to a latch, and a second end. The supporting member includes a first supporting ring sleeved on the lock core, a second supporting ring configured to support the second end of the transmission rod, and at least one supporting rib connected to the first and second supporting rings. The fixing member is configured to fix the supporting member to the lock core. Wherein, when the lock core is rotated relative to the lock case, the transmission rod is driven by the lock core to rotate, in order to move the latch.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a first light-emitting diode (LED) layer including a first LED of a first color type, the first LED layer having a first side and a second side opposite to the first side; a second LED layer over the first LED layer, the second LED layer including a second LED of a second color type, and the second LED layer having a first side and a second side opposite to the first side; and a third LED layer over the second LED layer, the third LED layer including a third LED of a third color type, and the third LED layer having a first side and a second side opposite to the first side; wherein the first color type, the second color type, and the third color type are different from each other.

Abstract: A method including forming a III-V compound layer on a substrate and implanting a main dopant in the III-V compound layer to form source and drain regions. The method further includes implanting a group V species into the source and drain regions. A semiconductor device including a substrate and a III-V compound layer over the substrate. The semiconductor device further includes source and drain regions in the III-V layer, wherein the source and drain regions comprises a first dopants and a second dopant, and the second dopant comprises a group V material.