Abstract: A method of forming an IC structure includes forming first and second power rails at a power rail level. First metal segments are formed at a first metal level above the power rail level. Each first metal segment of the plurality of first metal segments overlap one or both of the first power rail or the second power rail. First vias are formed between the power rail level and the first metal level. Second metal segments are formed at a second metal level above the first metal level. At least one second metal segment of the plurality of second metal segments overlaps the first power rail. At least one second metal segment of the plurality of second metal segments overlaps the second power rail. A plurality of second vias are formed between the first metal level and the second metal level.

Abstract: An interlocking lid which is suitable for a wet bench tank used in the processing of semiconductor wafer substrates. The interlocking lid includes a pair of lid panels typically provided with a clasp having elements for engaging and interlocking with each other when the lid panels are in a closed position. At least one of the lids may further include a beveled lid shoulder which facilitates runoff of liquids from and hinders pooling of liquids on the exterior surface of the lid.

Abstract: An interlocking lid which is suitable for a wet bench tank used in the processing of semiconductor wafer substrates. The interlocking lid includes a pair of lid panels typically provided with a clasp having elements for engaging and interlocking with each other when the lid panels are in a closed position. At least one of the lids may further include a beveled lid shoulder which facilitates runoff of liquids from and hinders pooling of liquids on the exterior surface of the lid.