Patents by Inventor Chi-Wei Lu
Chi-Wei Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12009362Abstract: A method of making a semiconductor device includes forming a first active region on a first side of a substrate. The method further includes forming a first source/drain (S/D) electrode surrounding a first portion of the first active region. The method further includes forming an S/D connect via extending through the substrate. The method further includes flipping the substrate. The method further includes forming a second active region on a second side of the substrate, wherein the second side of the substrate is opposite to the first side of the substrate. The method further includes forming a second S/D electrode surrounding a first portion of the second active region, wherein the S/D connect directly contacts both the first S/D electrode and the second S/D electrode.Type: GrantFiled: July 27, 2023Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang, Ching-Wei Tsai, Shang-Wen Chang
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Patent number: 11995390Abstract: A circuit includes a first transistor, a second type-one transistor, a first type-two transistor, a third type-one transistor, a fourth type-one transistor, and a fifth type-one transistor. The first type-one transistor has a gate configured to have a first supply voltage of a first power supply. The first type-two transistor has a gate configured to have a second supply voltage of the first power supply. The third type-one transistor has a first active-region conductively connected with an active-region of the first type-one transistor. Third type-one transistor has a second active-region and a gate conductively connected to each other. The fifth type-one transistor has a first active-region conductively connected with the gate of the third type-one transistor and has a second active-region configured to have a first supply voltage of a second power supply. The fifth type-one transistor is configured to be at a conducting state.Type: GrantFiled: December 9, 2022Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chi-Yu Lu, Ting-Wei Chiang, Hui-Zhong Zhuang, Jerry Chang Jui Kao, Pin-Dai Sue, Jiun-Jia Huang, Yu-Ti Su, Wei-Hsiang Ma
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Publication number: 20240162833Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.Type: ApplicationFiled: November 13, 2023Publication date: May 16, 2024Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
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Patent number: 11983479Abstract: A method of fabricating an integrated circuit includes placing a first set of conductive feature patterns on a first level, placing a second set of conductive feature patterns on a second level, placing a first set of via patterns between the second set of conductive feature patterns and the first set of conductive feature patterns, placing a third set of conductive feature patterns on a third level different from the first level and the second level, placing a second set of via patterns between the third set of conductive feature patterns and the second set of conductive feature patterns, and manufacturing the integrated circuit based on at least one of the above patterns of the integrated circuit.Type: GrantFiled: August 10, 2022Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jung-Chan Yang, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Li-Chun Tien, Meng-Hung Shen, Shang-Chih Hsieh, Chi-Yu Lu
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Publication number: 20240113061Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.Type: ApplicationFiled: December 5, 2023Publication date: April 4, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Mei-Ju LU, Chi-Han CHEN, Chang-Yu LIN, Jr-Wei LIN, Chih-Pin HUNG
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Publication number: 20240096756Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Syuan CIOU, Hui-Zhong ZHUANG, Ching-Wei TSAI, Shang-Wen CHANG
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Publication number: 20240088030Abstract: Provided are semiconductor devices that include a first gate structure having a first end cap portion, a second gate structure having a second end cap portion coaxial with the first gate structure, a first dielectric region separating the first end cap portion and the second end cap portion, a first conductive element extending over the first gate structure, a second conductive element extending over the second gate structure, and a gate via electrically connecting the second gate structure and the second conductive element, with the first dielectric region having a first width and being positioned at least partially under the first conductive element and defines a spacing between the gate via and an end of the second end cap portion that exceeds a predetermined distance.Type: ApplicationFiled: January 23, 2023Publication date: March 14, 2024Inventors: Chin-Liang CHEN, Chi-Yu LU, Ching-Wei TSAI, Chun-Yuan CHEN, Li-Chun TIEN
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Publication number: 20240087934Abstract: A method for operating a conveying system is provided. An overhead hoist transport (OHT) vehicle is provided, wherein the OHT vehicle includes a gripping member configured to grip and hold a carrier, and a receiver configured to receive a signal. The signal is transmitted to the receiver of the OHT vehicle. The OHT vehicle is moved toward the carrier, and the carrier is gripped by the gripping member of the OHT vehicle. A lifting force is determined based on a weight of a carrier, a number of workpieces in the carrier, or a vertical distance between the OHT vehicle and the carrier, and the lifting force is applied to the carrier.Type: ApplicationFiled: November 23, 2023Publication date: March 14, 2024Inventors: YONG-JYU LIN, FU-HSIEN LI, CHEN-WEI LU, CHI-FENG TUNG, HSIANG YIN SHEN
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Patent number: 8692227Abstract: A light-emitting device is disclosed. The light-emitting device comprises an epitaxial structure comprising a lower cladding layer of first conductivity type, an active layer comprising InGaN or AlGaInN on the lower cladding layer, and an upper cladding layer of second conductivity type on the active layer; a tunneling structure on the epitaxial structure comprising a first tunneling layer of second conductivity type with a doping concentration greater than 6×1019/cm3 on the upper cladding layer, and a second tunneling layer of first conductivity type with a doping concentration greater than 6×1019/cm3 on the first tunneling layer; and a current spreading layer of first conductivity type comprising AlInN on the tunneling structure.Type: GrantFiled: March 22, 2012Date of Patent: April 8, 2014Assignee: Epistar CorporationInventors: Chi-Wei Lu, Meng-Lun Tsai
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Publication number: 20120261686Abstract: A light-emitting element includes: a carrier; an adhesive layer formed on the carrier; and a plurality of light-emitting units disposed separately on the conductive adhesive layer, wherein each of the light-emitting units includes a first semiconductor layer, a light-emitting layer surrounding the first semiconductor layer, a second semiconductor layer surrounding the light-emitting layer; and a conductive structure connecting the first semiconductor layers of the light-emitting units to each other.Type: ApplicationFiled: April 12, 2011Publication date: October 18, 2012Inventor: Chi Wei LU
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Publication number: 20120175592Abstract: A light-emitting device is disclosed. The light-emitting device comprises an epitaxial structure comprising a lower cladding layer of first conductivity type, an active layer comprising InGaN or AlGaInN on the lower cladding layer, and an upper cladding layer of second conductivity type on the active layer; a tunneling structure on the epitaxial structure comprising a first tunneling layer of second conductivity type with a doping concentration greater than 6×1019/cm3 on the upper cladding layer, and a second tunneling layer of first conductivity type with a doping concentration greater than 6×1019/cm3 on the first tunneling layer; and a current spreading layer of first conductivity type comprising AlInN on the tunneling structure.Type: ApplicationFiled: March 22, 2012Publication date: July 12, 2012Inventors: Chi-Wei LU, Meng-Lun Tsai
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Patent number: 8164084Abstract: A light-emitting device with a tunneling structure and a current spreading layer is disclosed. It includes an electrically conductive permanent substrate, an adhesive layer, an epitaxial structure, a tunneling structure and a current spreading layer. The adhesive layer is on the electrically conductive permanent substrate. The epitaxial structure on the adhesive layer at least comprises an upper cladding layer, an active layer, and a lower cladding layer. The tunneling structure on the epitaxial structure comprises a first conductivity type semiconductor layer with a first doping concentration and a second conductivity type semiconductor layer with a second doping concentration. The current spreading layer is on the tunneling structure.Type: GrantFiled: August 5, 2009Date of Patent: April 24, 2012Assignee: Epistar CorporationInventors: Chi-Wei Lu, Meng-Lun Tsai
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Patent number: 8063557Abstract: A light-emitting device comprising a substrate, a light-emitting stack, and a transparent adhesive layer having wavelength-converting materials embedded therein formed within the light-emitting device is provided.Type: GrantFiled: August 14, 2007Date of Patent: November 22, 2011Assignee: Epistar CorporationInventors: Min-Hsun Hsieh, Ta-Cheng Hsu, Ya-Ju Lee, Wei-Chih Peng, Chi-Wei Lu, Ya-Lan Yang, Ying-Yong Su, Meng-Lnn Tsai
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Publication number: 20100032648Abstract: A light-emitting device with a tunneling structure and a current spreading layer is disclosed. It includes an electrically conductive permanent substrate, an adhesive layer, an epitaxial structure, a tunneling structure and a current spreading layer. The adhesive layer is on the electrically conductive permanent substrate. The epitaxial structure on the adhesive layer at least comprises an upper cladding layer, an active layer, and a lower cladding layer. The tunneling structure on the epitaxial structure comprises a first conductivity type semiconductor layer with a first doping concentration and a second conductivity type semiconductor layer with a second doping concentration. The current spreading layer is on the tunneling structure.Type: ApplicationFiled: August 5, 2009Publication date: February 11, 2010Inventors: Chi-Wei LU, Meng-Lun Tsai
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Publication number: 20070284999Abstract: A light-emitting device comprising a substrate, a light-emitting stack, and a transparent adhesive layer having wavelength-converting materials embedded therein formed within the light-emitting device is provided.Type: ApplicationFiled: August 14, 2007Publication date: December 13, 2007Inventors: Min-Hsun Hsieh, Ta-Cheng Hsu, Ya-Ju Lee, Wei-Chih Peng, Chi-Wei Lu, Ya-Lan Yang, Ying-Yong Su, Meng-Lnn Tsai
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Publication number: 20060081869Abstract: A flip-chip electrode light-emitting element formed by multilayer coatings where a translucent conducting layer and a highly reflective metal layer acts as flip-chip electrode for enhancing the LED luminous efficiency. The flip-chip electrode light-emitting element includes a translucent substrate, a semiconductor die structure attached on the translucent substrate and made of group III nitride compounds, and an intermediate layer adapted to support the inverted semiconductor die structure on a submount. The flip-chip electrode formed by multiplayer coatings includes a current-spreading transparent conducting layer formed on a top side of the second type semiconductor layer, a highly reflective metal layer formed on a top side of the transparent conducting layer, a metallic diffusion barrier layer formed on a top side of the highly reflective metal layer, and a bonding layer electrically coupled to the intermediate layer and formed on a top side of the barrier layer.Type: ApplicationFiled: October 4, 2005Publication date: April 20, 2006Inventors: Chi-Wei Lu, Wen-Chieh Huang, Pan-Tzu Chang, James Wang
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Publication number: 20040043524Abstract: A method for fabricating a light emitting diode with transparent substrate. The method comprises forming a first type cladding layer on a substrate, forming an active layer on the first type cladding layer, forming a second type cladding layer on the active layer, forming a second type transparent semiconductor layer on the second type cladding layer to serve as the transparent substrate, removing the substrate, and forming a first type contact layer on the surface of the first type cladding layer previously connected to the substrate. The transparent substrate does not absorb the emitted light, thereby the light emitting efficiency is increased by as much as double, and thus the performance of opto-electronic devices is improved.Type: ApplicationFiled: May 22, 2003Publication date: March 4, 2004Applicant: Arima Optoelectronics Corp.Inventors: Wen-Chieh Huang, Wen-Huang Tseng, Chi-Wei Lu
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Publication number: 20040004225Abstract: A light emitting diode and manufacturing method thereof. The light emitting diode comprises a n-type semiconductor layer formed on a substrate, an active layer formed on the n-type semiconductor layer, a p-type cladding layer formed on the active layer, and a hydrogen-adsorbing layer formed on the p-type cladding layer. The hydrogen-adsorbing layer adsorbs the hydrogen atoms near the interface to the p-type cladding layer, thereby enhancing the doping concentration of p-type cladding layer, and forming a low-resist ohmic contact by which the performance and reliability of opto-electronic devices is improved.Type: ApplicationFiled: November 7, 2002Publication date: January 8, 2004Applicant: Arima Optoelectronics Corp.Inventors: Ying-Che Sung, Chi-Wei Lu, Wen-Chieh Huang