Abstract: A light-emitting device comprises a substrate comprising a top surface; a plurality of light-emitting units formed on the top surface of the substrate comprising a first light-emitting unit, a second light-emitting unit, and one or a plurality of third light-emitting units, wherein each of the plurality of light-emitting units comprises a first semiconductor layer, an active layer and a second semiconductor layer; an insulating layer comprising a first insulating layer opening and a second insulating layer opening formed on each of the plurality of light-emitting units; a first extension electrode covering the first light-emitting unit, wherein the first extension electrode covers the first insulating layer opening on the first light-emitting unit without covering the second insulating layer opening on the first light-emitting unit; a second extension electrode covering the second light-emitting unit, wherein the second extension electrode covers the second insulating layer opening on the second light-emittin

Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.

Abstract: A motor commutation waveform generating circuit is provided. The motor commutation waveform generating circuit includes: an edge detection circuit, configured to receive sensing signals of the motor and derive a clock signal indicating a commutation switching point of the motor; an angle cutting circuit, controlled by the clock signal to generate an angle indication pulse indicating a rotation angle of the motor; a synthetic wave generating circuit, using the angle indication pulse to sequentially change waveform voltages corresponding to required angles and output them in segments; and a signal combining circuit, controlled by the clock signal to combine waveform voltage signals generated by the synthetic wave generating circuit, thereby obtaining a plurality of synthetic waveforms provided to a drive control system of the motor for drive control after pulse width modulation.

Abstract: A motor commutation waveform generating circuit is provided. The motor commutation waveform generating circuit includes: an edge detection circuit, configured to receive sensing signals of the motor and derive a clock signal indicating a commutation switching point of the motor; an angle cutting circuit, controlled by the clock signal to generate an angle indication pulse indicating a rotation angle of the motor; a synthetic wave generating circuit, using the angle indication pulse to sequentially change waveform voltages corresponding to required angles and output them in segments; and a signal combining circuit, controlled by the clock signal to combine waveform voltage signals generated by the synthetic wave generating circuit, thereby obtaining a plurality of synthetic waveforms provided to a drive control system of the motor for drive control after pulse width modulation.

Abstract: An electronic rotary encoder is configured to be disposed on a vertical rotary shaft in a rotary object to obtain two encoded signals: a phase A signal and a phase B signal for calculating a rotational speed and a position. The electronic rotary encoder includes: at least one Hall element outputting Hall signals used as a square wave of the phase A signal; two capacitors, to respectively obtain a first voltage and a second voltage; two buffer gates, to respectively output waveform signals of a first X voltage and a second X voltage; two comparators outputting, a control signal through a latch; and an exclusive OR gate, where a direction signal and the control signal outputted through the latch are inputted to the exclusive OR gate, to obtain the phase B signal.

Abstract: A voltage regulator is connected with an input/output circuit. The voltage regulator includes a controlling circuit, a sink voltage generator and a source voltage generator. The controlling circuit generates a first reference voltage, a second reference voltage, a first power start control signal and a second power start control signal. The sink voltage generator receives the first reference voltage and the first power start control signal. The source voltage generator receives the second reference voltage and the second power start control signal. When the voltage regulator is in a normal working state, the controlling circuit inactivates the first power start control signal and the second power start control signal, the sink voltage generator generates a sink voltage according to the first reference voltage, and the source voltage generator generates a source voltage according to the second reference voltage.

Abstract: A power system includes a voltage regulating system and a digital circuit. The voltage regulating system receives a power down signal. The voltage regulating system selectively generates an output voltage according to the power down signal. When the digital circuit receives the output voltage, the digital circuit is operated. When the digital circuit is not operated, the power down signal is activated. After the external voltage source is switched on and before a voltage of the external voltage source reaches a fixed voltage, the voltage regulating system ignores the power down signal and generates the output voltage. After the voltage of the external voltage source reaches the fixed voltage, the voltage regulating system generates the output voltage if the power down signal is inactivated; the voltage regulating system stops generating the output voltage if the power down signal is activated.

Abstract: A power system includes a voltage regulating system and a digital circuit. The voltage regulating system receives a power down signal. The voltage regulating system selectively generates an output voltage according to the power down signal. When the digital circuit receives the output voltage, the digital circuit is operated. When the digital circuit is not operated, the power down signal is activated. After the external voltage source is switched on and before a voltage of the external voltage source reaches a fixed voltage, the voltage regulating system ignores the power down signal and generates the output voltage. After the voltage of the external voltage source reaches the fixed voltage, the voltage regulating system generates the output voltage if the power down signal is inactivated; the voltage regulating system stops generating the output voltage if the power down signal is activated.

Abstract: A voltage regulator includes an operational amplifier, a transistor, a first resistor, a second resistor, an output voltage delaying circuit and a selecting circuit. The output voltage delaying circuit receives an output voltage and generates a delayed output voltage. A first input terminal of the selecting circuit receives a reference voltage. A second input terminal of the selecting circuit receives the delayed output voltage. An output terminal of the selecting circuit generates a control voltage to a first input terminal of the operational amplifier. If the reference voltage is larger than the delayed output voltage, the selecting circuit selects the delayed output voltage as the control voltage. If the reference voltage is smaller than the delayed output voltage, the selecting circuit selects the reference voltage as the control voltage.

Abstract: A voltage regulator circuit is provided, which includes a main regulator and at least one auxiliary regulator. The main regulator provides an output voltage and regulates the output voltage according to the output voltage and a reference voltage. Each auxiliary regulator is coupled to the main regulator. Each auxiliary regulator also provides the output voltage and regulates the output voltage according to the output voltage and the reference voltage. Each of the main regulator and the at least one auxiliary regulator provides a branch current of the same magnitude. An output current of the voltage regulator circuit includes the branch currents provided by the main regulator and the at least one auxiliary regulator.

Abstract: A voltage regulator includes an operational amplifier, a transistor, a first resistor, a second resistor, an output voltage delaying circuit and a selecting circuit. The output voltage delaying circuit receives an output voltage and generates a delayed output voltage. A first input terminal of the selecting circuit receives a reference voltage. A second input terminal of the selecting circuit receives the delayed output voltage. An output terminal of the selecting circuit generates a control voltage to a first input terminal of the operational amplifier. If the reference voltage is larger than the delayed output voltage, the selecting circuit selects the delayed output voltage as the control voltage. If the reference voltage is smaller than the delayed output voltage, the selecting circuit selects the reference voltage as the control voltage.

Abstract: A voltage regulator circuit is provided, which includes a main regulator and at least one auxiliary regulator. The main regulator provides an output voltage and regulates the output voltage according to the output voltage and a reference voltage. Each auxiliary regulator is coupled to the main regulator. Each auxiliary regulator also provides the output voltage and regulates the output voltage according to the output voltage and the reference voltage. Each of the main regulator and the at least one auxiliary regulator provides a branch current of the same magnitude. An output current of the voltage regulator circuit includes the branch currents provided by the main regulator and the at least one auxiliary regulator.

Abstract: A voltage regulator calibration circuit including a voltage regulator and a calibration unit is provided. The voltage regulator regulates an output voltage according to a reference voltage and a feedback voltage. The feedback voltage is in direct proportion to the output voltage. The calibration unit is coupled to the voltage regulator. The calibration unit generates a control code through binary search according to the output voltage and a target voltage. The control code determines the proportion of the feedback voltage to the output voltage.

Abstract: A method and apparatus for performing wake-up event management and an associated computer program product are provided, where the method is applied to an electronic device. The method includes the steps of: classifying a plurality of wake-up events of the electronic device according to at least one predetermined rule, wherein a specific wake-up event of the plurality of wake-up events is classified to be a triggering event, and one or more other wake-up events of the plurality of wake-up events are classified to be grouping events; arranging the grouping events as a group corresponding to the triggering event by setting wake-up time of each of the grouping events to be equivalent to that of the triggering event, for triggering the grouping events by utilizing the triggering event; and when the wake-up time of the triggering event is reached, performing operations corresponding to the triggering event and the grouping events, respectively.

Abstract: A voltage regulator calibration circuit including a voltage regulator and a calibration unit is provided. The voltage regulator regulates an output voltage according to a reference voltage and a feedback voltage. The feedback voltage is in direct proportion to the output voltage. The calibration unit is coupled to the voltage regulator. The calibration unit generates a control code through binary search according to the output voltage and a target voltage. The control code determines the proportion of the feedback voltage to the output voltage.

Abstract: A voltage regulator includes a constant voltage power circuit and an overcurrent protection circuit. The constant voltage power circuit generates an output voltage, an output current and a divided voltage. The overcurrent protection circuit includes a current sensing unit, a first mirroring unit, a voltage to current converting unit, a second mirroring unit, and a pull up unit. The current sensing unit generates a sensing current according to the output current. The first mirroring unit generates a first mirroring current. The first mirroring current is proportional to the output current. The voltage to current converting unit is used for converting the divided voltage into a first current. The second mirroring unit generates a second mirroring current. The second mirroring current is proportional to the second current. The pull up unit controls the output voltage and the output current according to the first mirroring current and the second mirroring current.

Abstract: A voltage regulator includes a constant voltage power circuit and an overcurrent protection circuit. The constant voltage power circuit generates an output voltage, an output current and a divided voltage. The overcurrent protection circuit includes a current sensing unit, a first mirroring unit, a voltage to current converting unit, a second mirroring unit, and a pull up unit. The current sensing unit generates a sensing current according to the output current. The first mirroring unit generates a first mirroring current. The first mirroring current is proportional to the output current. The voltage to current converting unit is used for converting the divided voltage into a first current. The second mirroring unit generates a second mirroring current. The second mirroring current is proportional to the second current. The pull up unit controls the output voltage and the output current according to the first mirroring current and the second mirroring current.

Abstract: A brushless motor drive device has a signal synthesizing circuit for converting a plurality of sensing signals into a plurality of drive signals so as to determine an amplitude of each of the drive signals in accordance with a current error signal. The sensing signals are generated by a sensing circuit in response to variations in a magnetic field of a brushless multi-phase motor. The current error signal is representative of a difference between a current command signal and a motor drive current. The signal synthesizing circuit is characterized by including a calibrating circuit for adjusting the current error signal in accordance with an amplitude of any of the sensing signals. The calibrating circuit includes a differential amplifying circuit, a rectifying circuit, a filtering circuit, and a dividing circuit.

Abstract: A power-on reset circuit has a reset starting circuit, a reset finishing circuit, and a latch circuit. The reset starting circuit generates a reset starting signal in response to a power voltage. When the power voltage reaches a predetermined reset finishing voltage, the reset finishing circuit generates a reset finishing signal. The latch circuit generates a power-on reset signal having a first state and a second state. In response to the reset starting signal, the latch circuit causes the power-on reset signal to transition to the first state. In response to the reset finishing signal, the latch circuit causes the power-on reset signal to transition to the second state.

Abstract: A motor control circuit includes a detector circuit, a comparator circuit, a sifter circuit, and a driver circuit. The detector circuit is coupled to a plurality of coils of a motor for generating a detection signal. The detection signal is in association with a terminal voltage of a selected-to-be-floated coil of the plurality of coils. Based on comparison between the detection signal and a reference voltage, the comparator circuit generates a comparison signal. The sifter circuit receives in sequence a first-time crossing and a second-time crossing from the comparison signal, and generates an indication signal in response to the second-time crossing. The driver circuit controls a commutation of the motor in response to the indication signal.