Abstract: A semiconductor device includes a substrate, a pair of semiconductor fins, a dummy fin structure, a gate structure, a plurality of source/drain structures, a crystalline hard mask layer, and an amorphous hard mask layer. The pair of semiconductor fins extend upwardly from the substrate. The dummy fin structure extends upwardly above the substrate and is laterally between the pair of semiconductor fins. The gate structure extends across the pair of semiconductor fins and the dummy fin structure. The source/drain structures are above the pair of semiconductor fins and on either side of the gate structure. The crystalline hard mask layer extends upwardly from the dummy fin and has a U-shaped cross section. The amorphous hard mask layer is in the first hard mask layer, wherein the amorphous hard mask layer having an U-shaped cross section conformal to the U-shaped cross section of the crystalline hard mask layer.

Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.

Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.

Abstract: The present disclosure relates to a chimeric influenza virus hemagglutinin (HA) polypeptide, comprising one or more stem domain sequence, each having at least 60% homology with a stem domain consensus sequence of H1 subtype HA (H1 HA) and/or H5 subtype HA (H5 HA), fused with one or more globular head domain sequence, each having at least 60% homology with a globular head domain consensus sequence of H1 subtype HA (H1 HA) or H5 subtype HA (H5 HA).

Abstract: In an embodiment, a device includes: a first nanostructure over a substrate, the first nanostructure including a channel region and a first lightly doped source/drain region, the first lightly doped source/drain region adjacent the channel region; a first epitaxial source/drain region wrapped around four sides of the first lightly doped source/drain region; an interlayer dielectric over the first epitaxial source/drain region; a source/drain contact extending through the interlayer dielectric, the source/drain contact wrapped around four sides of the first epitaxial source/drain region; and a gate stack adjacent the source/drain contact and the first epitaxial source/drain region, the gate stack wrapped around four sides of the channel region.

Abstract: A semiconductor device includes a substrate, a pair of semiconductor fins, a dummy fin structure, a gate structure, a plurality of source/drain structures, a crystalline hard mask layer, and an amorphous hard mask layer. The pair of semiconductor fins extend upwardly from the substrate. The dummy fin structure extends upwardly above the substrate and is laterally between the pair of semiconductor fins. The gate structure extends across the pair of semiconductor fins and the dummy fin structure. The source/drain structures are above the pair of semiconductor fins and on either side of the gate structure. The crystalline hard mask layer extends upwardly from the dummy fin and has an U-shaped cross section. The amorphous hard mask layer is in the first hard mask layer, wherein the amorphous hard mask layer having an U-shaped cross section conformal to the U-shaped cross section of the crystalline hard mask layer.

Abstract: The present disclosure relates to a chimeric influenza virus hemagglutinin (HA) polypeptide, comprising one or more stem domain sequence, each having at least 60% homology with a stem domain consensus sequence of H1 subtype HA (H1 HA) and/or H5 subtype HA (H5 HA), fused with one or more globular head domain sequence, each having at least 60% homology with a globular head domain consensus sequence of H1 subtype HA (H1 HA) or H5 subtype HA (H5 HA).

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

Abstract: A semiconductor device includes a first semiconductor die, a second semiconductor die, a dielectric layer, a first redistribution layer and a second redistribution layer. The first semiconductor die includes a first bonding pad and a second bonding pad. The second semiconductor die includes a third bonding pad and a fourth bonding pad. The dielectric layer covers the first semiconductor die and the second semiconductor die, and defines a first opening exposing the first bonding pad and the second bonding pad and a second opening exposing the third bonding pad and the fourth bonding pad. The first redistribution layer is disposed on the dielectric layer, and electrically connects the first bonding pad and the third bonding pad. The second redistribution layer is disposed on the dielectric layer, and electrically connects the second bonding pad and the fourth bonding pad.

Abstract: A broadcast receiver is capable of automatically switching to an applicable frequency of a radio station in a region, and stores plural geocodes related respectively to area blocks of the region, and plural frequencies related the radio station and each corresponding to one of the area codes. The broadcast receiver obtains a geographic coordinate set when a radio signal currently received from the radio station has poor quality. Then, the broadcast receiver converts the coordinate set to a geocode, finds an area code corresponding to the geocode, and receives the radio signal from the radio station on the frequency corresponding to the area code.

Abstract: A method of supplying electric power to a computer system compliant with specification provided by the OCP is provided. The method includes: a PLU setting an OCP_V3_EN signal to a high level so as to make the computer system operate in a first mode; a BMC obtaining card data from an OCP card when the computer system operates in the first mode; the BMC determining whether standby power provided by a PSU in the first mode is sufficient according to the card data; and when it is determined that the standby power is not sufficient, the BMC controlling the PLU to make the computer system operate in a second mode requiring more electric power, and to then control the PSU to provide main power that is greater than the standby power to the OCP card.

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

Abstract: A method of supplying electric power to a computer system compliant with specification provided by the OCP is provided. The method includes: a PLU setting an OCP_V3_EN signal to a high level so as to make the computer system operate in a first mode; a BMC obtaining card data from an OCP card when the computer system operates in the first mode; the BMC determining whether standby power provided by a PSU in the first mode is sufficient according to the card data; and when it is determined that the standby power is not sufficient, the BMC controlling the PLU to make the computer system operate in a second mode requiring more electric power, and to then control the PSU to provide main power that is greater than the standby power to the OCP card.

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

Abstract: A semiconductor device includes a first semiconductor die, a second semiconductor die, a dielectric layer, a first redistribution layer and a second redistribution layer. The first semiconductor die includes a first bonding pad and a second bonding pad. The second semiconductor die includes a third bonding pad and a fourth bonding pad. The dielectric layer covers the first semiconductor die and the second semiconductor die, and defines a first opening exposing the first bonding pad and the second bonding pad and a second opening exposing the third bonding pad and the fourth bonding pad. The first redistribution layer is disposed on the dielectric layer, and electrically connects the first bonding pad and the third bonding pad. The second redistribution layer is disposed on the dielectric layer, and electrically connects the second bonding pad and the fourth bonding pad.

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.