Patents by Inventor Chi-Yuan Hsu
Chi-Yuan Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240162833Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.Type: ApplicationFiled: November 13, 2023Publication date: May 16, 2024Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
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Patent number: 11967570Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.Type: GrantFiled: March 4, 2022Date of Patent: April 23, 2024Assignee: MediaTek Inc.Inventors: Chia-Hao Hsu, Tai-Yu Chen, Shiann-Tsong Tsai, Hsing-Chih Liu, Yao-Pang Hsu, Chi-Yuan Chen, Chung-Fa Lee
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Publication number: 20240127109Abstract: A federated learning method includes: providing importance parameters and performance parameters by client devices respectively to a central device, performing a training procedure by the central device, wherein the training procedure includes: selecting target devices from the client devices according to a priority order associated with the importance parameters, dividing the target devices into training groups according to a similarity of the performance parameters, notifying the target devices to perform iterations according to the training groups respectively to generate trained models, transmitting the trained models to the central device, and updating a global model based on the trained models, performing the training procedure again or outputting the global model to the client devices based on a convergence value of the global model and the number of times of performing the training procedure.Type: ApplicationFiled: November 10, 2022Publication date: April 18, 2024Applicant: INSTITUTE FOR INFORMATION INDUSTRYInventors: Ping Feng WANG, Chiun Sheng HSU, Chi-Yuan CHOU, Fu-Chiang CHANG
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Publication number: 20230126461Abstract: A method for calculating an object pick-and-place sequence and an electronic apparatus for automatic storage pick-and-place are provided. When a warehousing operation is to be performed, the following steps are performed. A weight of an object to be stocked that is to be put on a shelf is obtained. The weight is substituted into a plurality of coordinate positions corresponding to a plurality of unused grid positions respectively, so as to calculate a plurality of estimated center of gravity positions. Whether the estimated center of gravity positions are located within a balance standard area is determined so as to sieve out a plurality of candidate grid positions from these unused grid positions. One of the candidate grid positions is selected as a recommended position of the object to be stocked.Type: ApplicationFiled: July 13, 2022Publication date: April 27, 2023Applicant: GlobalWafers Co., Ltd.Inventors: Chia-Lin Li, Shang-Chi Wang, Chi Yuan Hsu, Han-Zong Wu
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Patent number: 7919339Abstract: A packaging method for light emitting diode module that includes fabricating frame around substrate, wherein the method comprises the steps of: fabricating a printed circuit layer with a plurality of staggered nodes on a substrate; fabricating a frame around the substrate; fabricating a protruding inclined pier around the bottom rim of the inner wall of the frame; fabricating a plurality of convex reflecting microstructure points on the surface of the printed circuit layer; positioning chips and wire bonding; spraying reflecting paint on the surface of the substrate and the inner wall of the frame except the chips; filling a silica gel diffusion layer formed by mixing the silica gel and the diffusion powder into the frame; and evenly coating a fluorescent glue layer formed by evenly mixing another silica gel and fluorescent powder on the silica gel diffusion layer.Type: GrantFiled: September 8, 2008Date of Patent: April 5, 2011Assignees: iLEDM photoelectronics, Inc.Inventor: Chi-Yuan Hsu
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Publication number: 20100059770Abstract: A package method and structure for a light emitting diode multi-layer module, wherein the method comprises the steps of: fabricating a printed circuit layer with a plurality of staggered nodes on a substrate; fabricating a frame around the substrate; fabricating a protruding inclined pier around the bottom rim of the inner wall of the frame; fabricating a plurality of convex reflecting microstructure points on the surface of the printed circuit layer; positioning chips and wire bonding; spraying reflecting paint on the surface of the substrate and the inner wall of the frame except the chips; filling a silica gel diffusion layer formed by mixing the silica gel and the diffusion powder into the frame; and evenly coating a fluorescent glue layer formed by evenly mixing another silica gel and fluorescent powder on the silica gel diffusion layer.Type: ApplicationFiled: September 8, 2008Publication date: March 11, 2010Inventor: Chi-Yuan Hsu
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Publication number: 20090059583Abstract: A package structure for a high-luminance light source comprises a circuit board, at least one light source, a resin coating covering the light source, and a fluorescent layer covering the resin coating. A light reflective layer is formed on a surface of the circuit board and is located correspondingly to the light source, and a plurality of reflective protrusions are disposed in a periphery of the light source. The light reflective layer is provided for reflecting the ineffective light of the light source, so as to transform the ineffective light into effective light. The reflective protrusions can reflect the horizontal ineffective light of the light source effectively, so that the light emitted at different angles from the light source are fully utilized to improve the luminescent efficiency of the light source.Type: ApplicationFiled: August 28, 2007Publication date: March 5, 2009Inventor: Chi-Yuan HSU
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Patent number: 6847405Abstract: One embodiment of the present invention provides a method and system for transforming a video bitstream in an interlaced format into a progressive format which can be displayed by a digital television. For example, the present embodiment utilizes the pixel information of a current field, previous field, and future field of the interlaced video bitstream to try to determine what the original content is of the missing lines of the current field. Specifically, the present embodiment utilizes different sets of pixel information in order to estimate the amount of motion that exist within a video bitstream. In this manner, the present embodiment is able to more closely determine the original value of the missing pixels of each field of the interlaced video bitstream. Therefore, the present embodiment provides a de-interlacing function enabling digital televisions to receive interlaced video bitstreams and display them in the progressive format.Type: GrantFiled: September 14, 2001Date of Patent: January 25, 2005Assignees: Sony Corporation, Sony Electronics, Inc.Inventors: Chi-Yuan Hsu, Dzung Tien Hoang
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Publication number: 20030052995Abstract: One embodiment of the present invention provides a method and system for transforming a video bitstream in an interlaced format into a progressive format which can be displayed by a digital television. For example, the present embodiment utilizes the pixel information of a current field, previous field, and future field of the interlaced video bitstream to try to determine what the original content is of the missing lines of the current field. Specifically, the present embodiment utilizes different sets of pixel information in order to estimate the amount of motion that exist within a video bitstream. In this manner, the present embodiment is able to more closely determine the original value of the missing pixels of each field of the interlaced video bitstream. Therefore, the present embodiment provides a de-interlacing function enabling digital televisions to receive interlaced video bitstreams and display them in the progressive format.Type: ApplicationFiled: September 14, 2001Publication date: March 20, 2003Inventors: Chi-Yuan Hsu, Dzung Tien Hoang
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Patent number: 5758825Abstract: A washing machine including a first electromagnetic valve connected to a cleaning solution supply source, a supply pipe having a cleaning solution input port connected to the first electromagnetic valve to receive cleaning solution from the cleaning solution supply source and a clean water input port connected to a clean water supply source to receive clean water from it and an output port, a second electromagnetic valve connected between the output port of the supply pipe and an automatic nozzle for permitting clean water and/or the cleaning solution to be delivered to the automatic nozzle, and a check valve for controlling the flowing direction of the cleaning solution from the first electromagnetic valve to the second electromagnetic valve.Type: GrantFiled: February 6, 1997Date of Patent: June 2, 1998Inventor: Chi-Yuan Hsu
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Patent number: D601280Type: GrantFiled: October 1, 2008Date of Patent: September 29, 2009Assignees: iLEDM photoelectronics, Inc.Inventor: Chi-Yuan Hsu
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Patent number: D608030Type: GrantFiled: September 26, 2008Date of Patent: January 12, 2010Assignees: iLEDM Photoelectronics, Inc.Inventor: Chi-Yuan Hsu