Patents by Inventor Chia-Chen Chien

Chia-Chen Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF, AND SUBSTRATE STRUCTURE
    Publication number: 20240145372
    Abstract: A substrate structure is provided, in which an insulating protection layer is formed on a substrate body having a plurality of electrical contact pads, and the insulating protection layer has a plurality of openings corresponding to the plurality of exposed electrical contact pads, and the insulating protection layer is formed with a hollow portion surrounding a partial edge of at least one of the electrical contact pads at at least one of the openings, so as to reduce the barrier of the insulating protection layer.
    Type: Application
    Filed: December 22, 2022
    Publication date: May 2, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chia-Wen TSAO, Wen-Chen HSIEH, Yi-Lin TSAI, Hsiu-Fang CHIEN
  • Method to Mitigate Defect Printability for ID Pattern
    Publication number: 20160033866
    Abstract: The present disclosure provides a method in accordance with some embodiments. The method includes loading a mask to a lithography system, wherein the mask includes an one-dimensional integrated circuit (1D IC) pattern; utilizing a pupil phase modulator in the lithography system to modulate phase of light diffracted from the mask; and performing a lithography exposing process to a target in the lithography system with the mask and the pupil phase modulator.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 4, 2016
    Inventors: Yen-Cheng Lu, Chia-Hao Hsu, Shinn-Sheng Yu, Chia-Chen Chien, Jeng-Horng Chen, Anthony Yen