Patents by Inventor Chia-Chih Hsu

Chia-Chih Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967570
    Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: April 23, 2024
    Assignee: MediaTek Inc.
    Inventors: Chia-Hao Hsu, Tai-Yu Chen, Shiann-Tsong Tsai, Hsing-Chih Liu, Yao-Pang Hsu, Chi-Yuan Chen, Chung-Fa Lee
  • Patent number: 11948920
    Abstract: Provided are a semiconductor device and a method for manufacturing the same, and a semiconductor package. The semiconductor device includes a die stack and a cap substrate. The die stack includes a first die, second dies stacked on the first die, and a third die stacked on the second dies. The first die includes first through semiconductor vias. Each of the second dies include second through semiconductor vias. The third die includes third through semiconductor vias. The cap substrate is disposed on the third die of the die stack. A sum of a thickness of the third die and a thickness of the cap substrate ranges from about 50 ?m to about 80 ?m.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: I-Chun Hsu, Yan-Zuo Tsai, Chia-Yin Chen, Yang-Chih Hsueh, Yung-Chi Lin, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Publication number: 20240096822
    Abstract: A package structure is provided. The package structure includes a first conductive pad in a first insulating layer, a conductive via in a second insulating layer directly under the first conductive pad, and a first under bump metallurgy structure directly under the first conductive via. In a first horizontal direction, the conductive via is narrower than the first under bump metallurgy structure, and the first under bump metallurgy structure is narrower than the first conductive pad.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Chia-Kuei HSU, Ming-Chih YEW, Shu-Shen YEH, Che-Chia YANG, Po-Yao LIN, Shin-Puu JENG
  • Publication number: 20240071949
    Abstract: Devices and methods for forming a chip package structure including a package substrate, a first adhesive layer attached to a top surface of the package substrate, and a beveled stiffener structure attached to the package substrate. The beveled stiffener structure may include a bottom portion including a tapered top surface, in which a bottom surface of the bottom portion is in contact with the first adhesive layer, a second adhesive layer attached to the tapered top surface, and a top portion including a tapered bottom surface, in which the tapered bottom surface is in contact with the second adhesive layer. The tapered top surface and the tapered bottom surface have a taper angle between 5 degrees and 60 degrees with respect to a top surface of the package substrate.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Chia-Kuei Hsu, Ming-Chih Yew, Li-Ling Liao, Shin-Puu Jeng
  • Publication number: 20190086979
    Abstract: A monitoring apparatus, a monitoring system, and a monitoring method are provided. The monitoring system includes the monitoring apparatus and a remote apparatus. The monitoring apparatus includes a power-supply circuit, at least one switching circuit, a power measurement module, and a processing module. The power-supply circuit generates at least one output power. The at least one switching circuit transmits the at least one output power to at least one electronic apparatus. The power measurement module measures the output power to obtain power utilizing information of the electronic apparatus. The processing module determines an operating status of the electronic apparatus by comparing the power utilizing information with reference information. Alternatively, the processing module transmits the power utilizing information to the remote apparatus, and the remote apparatus determines the operating status of the electronic apparatus by comparing the power utilizing information with the reference information.
    Type: Application
    Filed: July 2, 2018
    Publication date: March 21, 2019
    Applicants: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Jung-Yuan Kao, Hung-Chun Li, Johnson Lee, Chia-Chih Hsu, Tsia-Jui Ho
  • Patent number: 9948040
    Abstract: A connector includes an insulated housing, four connecting terminals, three pins and a plug. The insulated housing has a containing space and a disposing surface, and the disposing surface is located in the containing space. The connecting terminals are separately disposed in the containing space of the insulated housing and located on the disposing surface. The pins are separately disposed in the containing space of the insulated housing and extend from the disposing surface toward a direction away from the disposing surface, and the connecting terminals surround the pins. The plug is disposed in a center of the containing space of the insulated housing and located on the disposing surface. The plug is beneficial to rotate and has no directionality. The plug includes a plurality of conductive rings, the conductive rings are separately arranged along the direction away from the disposing surface, and the pins surround the plug.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: April 17, 2018
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Johnson Lee, Yao-Chung Yeh, Chia-Chih Hsu