Abstract: An over-current protection device includes a heat-sensitive layer and an electrode layer. The electrode layer includes a top metal layer and a bottom metal layer, and the heat-sensitive layer attached therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a conductive filler. The polymer matrix includes a polyolefin-based homopolymer and a polyolefin-based copolymer. The polyolefin-based homopolymer has a first coefficient of thermal expansion (CTE), and the polyolefin-based copolymer has a second CTE lower than the first CTE. The polyolefin-based homopolymer and the polyolefin-based copolymer together form an interpenetrating polymer network (IPN).

Abstract: An electronic package and a method thereof are provided, in which an electronic component, conductive structures and conductive components are disposed on one side of a carrier and electrically connected to the carrier. The electronic component, the conductive structures and the conductive components are encapsulated by an encapsulation layer. A shielding layer is formed on the encapsulation layer to cover the electronic component, where the shielding layer is electrically connected to the conductive structures and free from being electrically connected to the conductive components. A shielding structure is formed to cover the other side of the carrier.

Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.

Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, a conductive filler, and a titanium-containing dielectric filler. The polymer matrix has a fluoropolymer. The titanium-containing dielectric filler has a compound represented by a general formula of MTiO3, wherein the M represents transition metal or alkaline earth metal. The total volume of the PTC material layer is calculated as 100%, and the titanium-containing dielectric filler accounts to for 5-15% by volume of the PTC material layer.

Abstract: A power control system of a rack heat-dissipation system, which receives output voltages of a rack power supply and a module power supply, includes a first control module and a second control module operating in parallel. The first control module includes a first switching unit, a first voltage converting unit and a first monitoring unit. The second control module includes a second switching unit, a second voltage converting unit and a second monitoring unit. The first monitoring unit is connected to the rack power supply, the module power supply, the first switching unit and the first voltage converting unit, and the second monitoring unit is connected to the rack power supply, the module power supply, the second switching unit and the second voltage converting unit. The heat dissipation system can be kept in the normal operation even if one of the control modules is failed.

Abstract: Provided are pamoate salts of ketamine having a stoichiometry of 2:1 of ketamine to pamoate, including R, S-ketamine pamoate, S-ketamine pamoate, or R-ketamine pamoate, and crystalline or amorphous forms of the pamoate salts, and having excellent safety and properties for pharmaceutical applications. Also provided are pharmaceutical compositions including the pamoate salts of ketamine and their uses in treating a CNS disease or serving as an anesthetic.

Abstract: An electronic package is provided, in which electronic elements and at least one packaging module including a semiconductor chip and a shielding structure covering the semiconductor chip are disposed on a carrier structure, an encapsulation layer encapsulates the electronic elements and the packaging module, and a shielding layer is formed on the encapsulation layer and in contact with the shielding structure. Therefore, the packaging module includes the semiconductor chip and the shielding structure and has a chip function and a shielding wall function simultaneously.

Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, and a conductive filler. The polymer matrix has a fluoropolymer. The total volume of the PTC material layer is calculated as 100%, and the fluoropolymer accounts for 47-62% by volume of the PTC material layer. The fluoropolymer has a melt viscosity higher than 3000 Pa·s.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a first conductive filler. The polymer matrix includes a polyolefin-based polymer and a fluoropolymer. The fluoropolymer has a melt flow index higher than 1.9 g/10 min, and the polyolefin-based polymer and the fluoropolymer together form an interpenetrating polymer network (IPN). The first conductive filler has a metal-ceramic compound dispersed in the polymer matrix.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.

Abstract: An electronic device includes a casing, a circuit board and a grounding assembly. The circuit board has a first surface and a second surface, wherein an input terminal and an output terminal are disposed on the second surface. The grounding assembly comprises a conducting terminal, a first grounding element and a second grounding element. The conducting terminal is disposed on the first surface of the circuit board, and the first grounding element is disposed adjacent to the conducting terminal. The first grounding element penetrates the circuit board and electrically couples with the conducting terminal and the casing, and the second grounding element correspondingly penetrates the circuit board and the conducting element, so that a first portion of the second grounding element electrically couples with the input terminal and the output terminal of the circuit board, and a second portion of the second grounding element electrically couples with the conducting terminal.

Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.

Abstract: A chip-scale linear light-emitting device includes a submount substrate, light-emitting diode (LED) semiconductor chips, a chip-scale packaging structure and a reflective structure. The LED semiconductor chips, the packaging structure and the reflective structure are disposed on the submount substrate, wherein the packaging structure partially covers the chip-upper surface and/or the chip-edge surfaces of the LED semiconductor chips, and the reflective structure partially covers the package-top surface and/or the package-side surfaces of the packaging structure. If one of the chip-edge surfaces and the package-side surface of the packaging structure are exposed from the reflective structure as a primary light-emitting side surface, a side-view type linear light-emitting device is formed. If the package-top surface of the packaging structure is exposed from the reflective structure as a primary light-emitting top surface, a top-view type linear light-emitting device is formed.

Abstract: An asymmetrically shaped chip-scale packaging (CSP) light-emitting device (LED) includes an LED chip, a photoluminescent structure (or a light-transmitting structure), and a reflective structure. The photoluminescent structure covers the upper surface and/or the edge surface of the LED chip; and the reflective structure at least partially covers the edge surface of the photoluminescent structure. The reflective structure partially reflects the primary light emitted from the edge surface of the LED chip or the converted secondary light radiated from the edge surface of the photoluminescent structure, therefore shaping the radiation pattern asymmetrically.

Abstract: A proximity detection method is for detecting if a user is proximate to a proximity detection keyboard, and the proximity detection keyboard includes a plurality of electrodes and at least one grounding element, which is disposed correspondingly to the electrodes. The proximity detection method includes an equivalent capacitance detecting step and a proximity event determining step. The equivalent capacitance detecting step is for detecting an equivalent capacitance of each of the electrodes. The equivalent capacitance of each of the electrodes is defined by a corresponding proximity capacitance and a corresponding parasitic capacitance. A proximity event determining step is for comparing the equivalent capacitance of at least one of the electrodes and a corresponding capacitance threshold value to determine if a proximity event is existed. The electrodes are respectively corresponding to the capacitance threshold values being predetermined.

Abstract: A chip-scale linear light-emitting device includes a submount substrate, light-emitting diode (LED) semiconductor chips, a chip-scale packaging structure and a reflective structure. The LED semiconductor chips, the packaging structure and the reflective structure are disposed on the submount substrate, wherein the packaging structure partially covers the chip-upper surface and/or the chip-edge surfaces of the LED semiconductor chips, and the reflective structure partially covers the package-top surface and/or the package-side surfaces of the packaging structure. If one of the chip-edge surfaces and the package-side surface of the packaging structure are exposed from the reflective structure as a primary light-emitting side surface, a side-view type linear light-emitting device is formed. If the package-top surface of the packaging structure is exposed from the reflective structure as a primary light-emitting top surface, a top-view type linear light-emitting device is formed.

Abstract: An asymmetrically shaped chip-scale packaging (CSP) light-emitting device (LED) includes an LED chip, a photoluminescent structure (or a light-transmitting structure), and a reflective structure. The photoluminescent structure covers the upper surface and/or the edge surface of the LED chip; and the reflective structure at least partially covers the edge surface of the photoluminescent structure. The reflective structure partially reflects the primary light emitted from the edge surface of the LED chip or the converted secondary light radiated from the edge surface of the photoluminescent structure, therefore shaping the radiation pattern asymmetrically.

Abstract: A chip-scale linear light-emitting device includes a submount substrate, light-emitting diode (LED) semiconductor chips, a chip-scale packaging structure and a reflective structure. The LED semiconductor chips, the packaging structure and the reflective structure are disposed on the submount substrate, wherein the packaging structure partially covers the chip-upper surface and/or the chip-edge surfaces of the LED semiconductor chips, and the reflective structure partially covers the package-top surface and/or the package-side surfaces of the packaging structure. If one of the chip-edge surfaces and the package-side surface of the packaging structure are exposed from the reflective structure as a primary light-emitting side surface, a side-view type linear light-emitting device is formed. If the package-top surface of the packaging structure is exposed from the reflective structure as a primary light-emitting top surface, a top-view type linear light-emitting device is formed.

Abstract: An asymmetrically shaped chip-scale packaging (CSP) light-emitting device (LED) includes an LED chip, a photoluminescent structure (or a light-transmitting structure), and a reflective structure. The photoluminescent structure covers the upper surface and/or the edge surface of the LED chip; and the reflective structure at least partially covers the edge surface of the photoluminescent structure. The reflective structure partially reflects the primary light emitted from the edge surface of the LED chip or the converted secondary light radiated from the edge surface of the photoluminescent structure, therefore shaping the radiation pattern asymmetrically.