Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes an interconnect structure overlying a semiconductor substrate and comprising a conductive wire. A passivation structure overlies the interconnect structure. An upper conductive structure overlies the passivation structure and comprises a first conductive layer, a dielectric layer, and a second conductive layer. The first conductive layer is disposed between the dielectric layer and the passivation structure. The second conductive layer extends along a top surface of the dielectric layer and penetrates through the first conductive layer and the passivation structure to the conductive wire.

Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.

Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.

Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.

Abstract: A method includes etching a gate stack in a wafer to form a trench, depositing a silicon nitride liner extending into the trench, and depositing a silicon oxide layer. The process of depositing the silicon oxide layer includes performing a treatment process on the wafer using a process gas including nitrogen and hydrogen, and performing a soaking process on the wafer using a silicon precursor.

Abstract: An inspection system includes an excitation light source, a voltage-sensing film, an illumination light source, an image capture device. The excitation light source provides an excitation beam to light-emitting diodes to generate open-circuit voltages. The voltage-sensing film is at a top side of the light-emitting diodes and includes a voltage-sensing medium layer and a first electrode layer. The first electrode layer is in the voltage-sensing medium layer to provide a gain effect of the open-circuit voltages, so that the voltage-sensing medium layer senses the open-circuit voltages, and a display of the voltage-sensing medium layer is changed with a portion or all of the open-circuit voltages. The illumination light source provides an illumination beam to the voltage-sensing film to generate a sensing image according to a display change. The image capture device is on a transmission path of the sensing image and receives the sensing image to generate an inspection result.

Abstract: A backlight module including a light guide plate, a light source, a diffuse reflector and a light-splitting film is provided. The light guide plate has a light incident surface, and a light-emitting surface and a bottom surface which are respectively connected to the light incident surface and opposite to each other. The light source is disposed on one side of the light incident surface of the light guide plate. The diffuse reflector is disposed on one side of the bottom surface of the light guide plate. The light-splitting film is disposed between the light guide plate and the diffuse reflector. The light-splitting film has a substrate and a plurality of first optical microstructures disposed on one side of the substrate. An extending direction of the first optical microstructures intersects with the light incident surface of the light guide plate. A display apparatus using the backlight module is also provided.

Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.

Abstract: A semiconductor-on-insulator (SOI) structure and a method for forming the SOI structure. The method includes forming a first dielectric layer on a first semiconductor layer. A second semiconductor layer is formed over an etch stop layer. A cleaning solution is provided to a first surface of the first dielectric layer. The first dielectric layer is bonded under the second semiconductor layer in an environment having a substantially low pressure. An index guiding layer may be formed over the second semiconductor layer. A third semiconductor layer is formed over the second semiconductor layer. A distance between a top of the third semiconductor layer and a bottom of the second semiconductor layer varies between a maximum distance and a minimum distance. A planarization process is performed on the third semiconductor layer to reduce the maximum distance.

Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.

Abstract: A system including a processor configured to perform generating a plurality of different layout blocks; selecting, among the plurality of layout blocks, layout blocks corresponding to a plurality of blocks in a floorplan of a circuit; combining the selected layout blocks in accordance with the floorplan into a layout of the circuit; and storing the layout of the circuit in a cell library or using the layout of the circuit to generate a layout for an integrated circuit (IC) containing the circuit. Each of the plurality of layout blocks satisfies predetermined design rules and includes at least one of a plurality of different first block options associated with a first layout feature, and at least one of a plurality of different second block options associated with a second layout feature different from the first layout feature.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first and second transistors arranged over a substrate. The first transistor includes first channel structures extending between first and second source/drain regions. A first gate electrode is arranged between the first channel structures, and a first protection layer is arranged over a topmost one of the first channel structures. The second transistor includes second channel structures extending between the second source/drain region and a third source/drain region. A second gate electrode is arranged between the second channel structures, and a second protection layer is arranged over a topmost one of the second channel structures. The integrated chip further includes a first interconnect structure arranged between the substrate and the first and second channel structures, and a contact plug structure coupled to the second source/drain region and arranged above the first and second gate electrodes.

Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.

Abstract: A power-saving charging device controls both a primary side controller and a secondary side controller to be in a shutdown state when an output terminal is not connected to the load. When the output terminal is connected to the load, the secondary side controller receives a power-on power supply from a power storage unit, performs a power-on procedure and enters a working state. The primary side controller receives a power-on signal from the power storage unit, performs the power-on procedure according to the power-on signal, and enters the working state. Accordingly, when the charging device is not connected to the load, it can enter a standby state with extremely low power consumption in which the primary side controller and the secondary side controller are both turned off, thereby achieving the effect of saving the power consumption of the controller when the charging device is in standby.

Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.

Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may determine multiple voltage values associated with a rechargeable battery over a period of time; store the multiple voltage values with respect to multiple clock values over the period of time; determine a voltage drop rate from the multiple voltage values and the multiple clock values; determine a threshold voltage value associated with a predicted energy capacity of the rechargeable battery for a mobile information handling system (IHS) to perform a power state transition; determine a voltage value associated with the rechargeable battery; determine that the voltage value has reached the threshold voltage value; provide a notification to an operating system executed by the mobile IHS; store data from a volatile memory medium to a non-volatile memory medium; and transition the mobile IHS from an operational state to a power conservation state.

Abstract: An oscillation circuit including an amplifier, a feedback resistor and a first switch circuit is provided. The amplifier inverts and amplifies an oscillation signal received from an input terminal thereof to provide an output oscillation signal at an output terminal thereof. The feedback resistor is coupled between the input terminal and the output terminal, and coupled with the first switch circuit in parallel. The first switch circuit conducts the input terminal to the output terminal in one of the following situations: (1) an input voltage of the oscillation signal is higher than an output voltage of the output oscillation signal by at least a first threshold value; and (2) the output voltage is higher than the input voltage by at least a second threshold value. The first switch circuit has a first on-state resistance smaller than a resistance of the feedback resistor.

Abstract: An oscillation circuit including an amplifier, a feedback resistor and a first switch circuit is provided. The amplifier inverts and amplifies an oscillation signal received from an input terminal thereof to provide an output oscillation signal at an output terminal thereof. The feedback resistor is coupled between the input terminal and the output terminal, and coupled with the first switch circuit in parallel. The first switch circuit conducts the input terminal to the output terminal in one of the following situations: (1) an input voltage of the oscillation signal is higher than an output voltage of the output oscillation signal by at least a first threshold value; and (2) the output voltage is higher than the input voltage by at least a second threshold value. The first switch circuit has a first on-state resistance smaller than a resistance of the feedback resistor.

Abstract: A connector in an information handling system includes a battery connector, a battery receptacle, and a signal pin structure contact. The battery connector includes a first set of power pins and a first set of signal pins. The battery receptacle includes a second set of power pins and a second set of signal pins. The first and second sets of power pins are coupled together when the battery connector is inserted within the battery receptacle. The signal pin structure contact transitions between an open position and a closed position. The signal pin structure contact couples the first and second sets of signal pins when the signal pin structure contact is in the closed position. A power down signal is provided to components of the information handling system when the signal pin structure contact is in the open position.