Abstract: A resin composition including a modified maleimide resin is provided. The modified maleimide resin is formed from a dicyclopentadiene (DCPD)-based resin having an amino group and a maleic anhydride by a condensation polymerization. The dicyclopentadiene-based resin having an amino group is formed by nitration reaction and hydrogenation reaction of dicyclopentadiene phenolic resin.

Abstract: A method for manufacturing a semiconductor structure includes forming a plurality of dummy structures spaced apart from each other, forming a plurality of dielectric spacers laterally covering the dummy structures to form a plurality of trenches defined by the dielectric spacers, filling a conductive material into the trenches to form electrically conductive features, selectively depositing a capping material on the electrically conductive features to form a capping layer, removing the dummy structures to form a plurality of recesses defined by the dielectric spacers, filling a sacrificial material into the recesses so as to form sacrificial features, depositing a sustaining layer on the sacrificial features, and removing the sacrificial features to form air gaps confined by the sustaining layer and the dielectric spacers.

Abstract: Semiconductor devices and methods of manufacture are discussed. In an embodiment, a method of manufacturing a semiconductor device includes: forming first nanostructures from a first material over a substrate; forming second nanostructures from a second material different from the first material over the substrate, wherein the first nanostructures and the second nanostructures alternate vertically above the substrate; removing the first nanostructures; after the removing the first nanostructures forming an interposer in between the second nanostructures; after the forming the interposer forming a first source/drain region over the substrate and in direct physical contact with the second nanostructures; and removing the interposer exposing surfaces of each of the second nanostructures.

Abstract: A resin composition is provided. The resin composition includes a resin and an inorganic filler. The resin includes a bismaleimide resin and a polyphenylene ether resin. The inorganic filler includes a first inorganic filler and a second inorganic filler. An average particle size of the first inorganic filler is 0.3 ?m to 0.6 ?m. An average particle size of the second inorganic filler is 20 ?m to 50 ?m.

Abstract: A resin composition is provided. The resin composition includes a resin mixture, a flame retardant, spherical silica and a siloxane coupling agent. The resin mixture includes a first resin polymerized by a monomer mixture comprising styrene, divinylbenzene and ethylene, a second resin polymerized by modified dicyclopentadiene diamine and maleic anhydride, and a SBS resin. The resin composition of the disclosure may have a high glass transition temperature and a low dielectric constant and a low dissipation factor after curing.

Abstract: A resin composition and use thereof, wherein the resin composition includes a resin base, an inorganic filler and a siloxane coupling agent. The resin base includes bismaleimide resins, benzoxazine resins, and naphthenic epoxy resins, and the inorganic filler includes strontium titanate or calcium-doped strontium titanate.

Abstract: A resin composition including a modified maleimide resin is provided. The modified maleimide resin is formed from a dicyclopentadiene (DCPD)-based resin having an amino group and a maleic anhydride by a condensation polymerization. The dicyclopentadiene-based resin having an amino group is formed by nitration reaction and hydrogenation reaction of dicyclopentadiene phenolic resin.

Abstract: The present application provides a method for promoting the sternness and/or transdifferentiation of acinar cells, comprising the following steps: providing an acinar cell, transfecting a plasmid into the acinar cell, and culturing the transfected acinar cell, wherein the plasmid contains a genetic material for overexpression of N-acetylglucosaminyltransferase V (GnT-V).

Abstract: A method for forming a chip package structure is provided. The method includes removing a first portion of a substrate to form a first recess in the substrate. The method includes forming a buffer structure in the first recess. A first Young's modulus of the buffer structure is less than a second Young's modulus of the substrate. The method includes forming a first wiring structure over the buffer structure and the substrate. The method includes bonding a chip package to the first wiring structure. The chip package has an interposer substrate and a chip structure over the interposer substrate, and a first corner of the interposer substrate and a second corner of the chip structure overlap the buffer structure in a top view of the chip package and the buffer structure.

Abstract: A semiconductor device and method of manufacture are provided. After a patterning of a middle layer, the middle layer is removed. In order to reduce or prevent damage to other underlying layers exposed by the patterning of the middle layer and intervening layers, an inhibitor is included within an etching process in order to inhibit the amount of material removed from the underlying layers.

Abstract: The present disclosure provides a semiconductor structure with having a source/drain feature with a central cavity, and a source/drain contact feature formed in central cavity of the source/drain region, wherein the source/drain contact feature is nearly wrapped around by the source/drain region. The source/drain contact feature may extend to a lower most of a plurality semiconductor layers.

Abstract: A resin composition is provided, which includes a novel low dielectric resin, a SBS resin, a cross-linking agent, a PPE resin, a halogen-free flame retardant, a spherical silica, and a siloxane coupling agent. The novel low dielectric resin is a maleimide resin. With the formula, the resin composition may improve resin fluidity and glass transition temperature (Tg) while maintaining low dielectric, thereby enhancing the overall processability.

Abstract: A golf teaching method and a golf teaching system are provided. The golf teaching method includes: configuring image capturing devices and golf simulator to capture swing images and corresponding simulator data records, when a user performs a golf swing; configuring an expert model that includes expert motion information and corresponding correction suggestion information; configuring a computing device to perform an analysis process on the swing images and the simulator data records to divide the golf swing into user motions according to stages and obtaining records of user motion information corresponding to the plurality of stages, and to compare the user motion information with the corresponding expert motion information in each stage through the expert model, and to provide the corresponding correction suggestion information according to a comparison result; and configuring a user interface to provide the correction suggestion information.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: Exemplary video processing methods and apparatuses for encoding or decoding a current block by inter prediction are disclosed. Input data of a current block is received and partitioned into sub-partitions and motion refinement is independently performed on each sub-partition. A reference block for each sub-partition is obtained from one or more reference pictures according to an initial motion vector (MV). A refined MV for each sub-partition is derived by searching around the initial MV with N-pixel refinement. One or more boundary pixels of the reference block for a sub-partition is padded for motion compensation of the sub-partition. A final predictor for the current block is generated by performing motion compensation for each sub-partition according to its refined MV. The current block is then encoded or decoded according to the final predictor.

Abstract: A semiconductor device includes a substrate having a flash memory region and a logic device region, a logic transistor disposed in the logic device region, and a flash memory transistor disposed in the flash memory region. The flash memory transistor includes a metal select gate having two opposite sidewalls and two memory gates disposed on the two opposite sidewalls of the metal select gate.

Abstract: The invention provides a high thermal conductivity fluororesin composition and products thereof. The high thermal conductivity fluororesin composition includes a polytetrafluoroethylene resin, a fluorine-containing copolymer, spherical inorganic fillers and impregnation aids.

Abstract: A composite material substrate includes an inorganic filler, a resin composition, and a dispersant. The resin composition includes a bismaleimide resin, a naphthalene ring-containing epoxy resin, and a benzoxazine resin. The inorganic filler, the resin composition, and the dispersant are mixed together.

Abstract: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate. The chip structure has an inclined sidewall, the inclined sidewall is at an acute angle to a vertical, the vertical is a direction perpendicular to a main surface of the chip structure, and the acute angle is in a range from about 12 degrees to about 45 degrees. The method also includes forming a protective layer to surround the chip structure.

Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.