Patents by Inventor Chia-Ming Chuang

Chia-Ming Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240179311
    Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Chia-Ming TSAI, Tzu-Der CHUANG, Chih-Wei HSU, Ching-Yeh CHEN, Zhi-Yi LIN
  • Publication number: 20240172434
    Abstract: A semiconductor device includes a stacked gate structure, a plurality of stacks and a first conductive layer. The stacks are disposed aside the stacked gate structure and arranged along both a first direction and a second direction perpendicular to the first direction, wherein the stacks are extended continuously along the first direction and segmented in the second direction. The first conductive layer is disposed between segmented portions of the stacks along the second direction, wherein top surfaces of the segmented portions of the stacks are higher than a top surface of the first conductive layer.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Patent number: 11985314
    Abstract: Video processing methods and apparatuses in a video encoding or decoding system for processing out-of-bounds nodes in a current picture. An out-of-bounds node is a coding tree node with a block region across a current picture boundary. The video processing method or apparatus determines an inferred splitting type, applies the inferred splitting type to split the out-of-bounds node into child blocks, adaptively splits each child block into one or multiple leaf blocks, and encodes or decodes the leaf blocks in the out-of-bounds node inside the current picture. The inferred splitting type for partitioning out-of-bounds nodes in an inter slice, picture, or tile is the same as the inferred splitting type for partitioning out-of-bounds nodes in an intra slice, picture, or tile.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 14, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Shih-Ta Hsiang
  • Patent number: 11978669
    Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Lin Chuang, Chia-Hao Chang, Sheng-Tsung Wang, Lin-Yu Huang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Patent number: 11955535
    Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to one embodiment includes an active region including a channel region and a source/drain region adjacent the channel region, a gate structure over the channel region of the active region, a source/drain contact over the source/drain region, a dielectric feature over the gate structure and including a lower portion adjacent the gate structure and an upper portion away from the gate structure, and an air gap disposed between the gate structure and the source/drain contact. A first width of the upper portion of the dielectric feature along a first direction is greater than a second width of the lower portion of the dielectric feature along the first direction. The air gap is disposed below the upper portion of the dielectric feature.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hao Chang, Lin-Yu Huang, Sheng-Tsung Wang, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 11930174
    Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: March 12, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Tzu-Der Chuang, Chih-Wei Hsu, Ching-Yeh Chen, Zhi-Yi Lin
  • Patent number: 11924444
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. One method receives input data related to a current block in a current picture at a video encoder side or a video bitstream corresponding to compressed data including the current block in the current picture at a video decoder side, and determines a first boundary associated with the current block, wherein the first boundary corresponds to one vertical boundary or one horizontal boundary of the current block. The method then applies de-blocking process to a reconstructed current block corresponding to the current block to result in a filtered-reconstructed current block, using a plurality of first reference samples at a same side of the first boundary, and replaces a first set of the first reference samples by one or more padding values. The method then generates a filtered decoded picture including the filtered-reconstructed current block.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 5, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11925017
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Patent number: 11916133
    Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a gate structure sandwiched between and in contact with a first spacer feature and a second spacer feature, a top surface of the first spacer feature and a top surface of the second spacer feature extending above a top surface of the gate structure, a gate self-aligned contact (SAC) dielectric feature over the first spacer feature and the second spacer feature, a contact etch stop layer (CESL) over the gate SAC dielectric feature, a dielectric layer over the CESL, a gate contact feature extending through the dielectric layer, the CESL, the gate SAC dielectric feature, and between the first spacer feature and the second spacer feature to be in contact with the gate structure, and a liner disposed between the first spacer feature and the gate contact feature.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Zhen Yu, Lin-Yu Huang, Chia-Hao Chang, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 11916077
    Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Ru-Gun Liu, Wei-Cheng Lin, Lei-Chun Chou, Wei-An Lai
  • Publication number: 20230111507
    Abstract: A timing controller circuit is arranged to control at least a gate in panel (GIP) circuit in a display panel, and includes a data receiving circuit, a timing detection circuit, a control circuit, and a data transmitting circuit, wherein the data receiving circuit is arranged to receive an image data, the timing detection circuit is coupled to the data receiving circuit, and is arranged to detect an input timing of the image data, the control circuit is coupled to the timing detection circuit, and is arranged to determine a GIP timing of the GIP circuit according to the input timing of the image data, and generate a timing control output according to the GIP timing, and the data transmitting circuit is coupled to the control circuit, and is arranged to transmit the timing control output to the GIP circuit.
    Type: Application
    Filed: August 1, 2022
    Publication date: April 13, 2023
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Chia-Ming Chuang, Ming-Hung Weng, Cheng-Che Tsai
  • Patent number: 11605849
    Abstract: A thermal management system for high power electrical equipment includes temperature adjustment means, sensing means, and a microcontroller. The temperature adjustment means includes small and large temperature adjustment units and a selection device, wherein the small and large temperature adjustment units are thermally connected to the battery cells and the battery enclosure, respectively. The sensing means includes temperature sensors for measuring the temperatures of the battery cells, and capacity sensors for measuring the remaining capacities of the battery cells available for the electrical equipment, wherein the temperature and capacity sensors can output corresponding signals. The microcontroller receives the signals from the temperature and capacity sensors, and enables or disenables the temperature adjustment means according to the temperature signals.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: March 14, 2023
    Assignee: MINTRON ENERGY TECHNOLOGY CO., LTD.
    Inventor: Chia-Ming Chuang
  • Patent number: 11529846
    Abstract: An adaptive air conditioning system, a method for the system, and a carrier equipped with the system are disclosed. The carrier includes at least one adaptive air conditioning system. The carrier has a body, which includes at least one cabin defining a compartment for accommodating transported objects, such as passengers or cargos. The adaptive air conditioning system includes data collecting apparatus, temperature control apparatus, and a microcontroller. The temperature control apparatus includes a liquid circulation unit, an air circulation unit, and a control switch. With the adaptive air conditioning system, the air and internal installation in the compartment can be controlled at a predetermined temperature more promptly, efficiently, uniformly, and flexibly, thus increasing comfort level for the passengers or meeting the temperature requirements for the cargos.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: December 20, 2022
    Assignee: MINTRON ENERGY TECHNOLOGY CO., LTD.
    Inventors: Chia-Ming Chuang, Chen-Sheng Huang
  • Patent number: 11493164
    Abstract: A structure formed by temperature difference includes an enveloped part, an enveloping part, and a low heat transfer layer. The enveloped part has a free section and an engagement section. The enveloping part defines at least one holding space corresponding to the engagement section. The holding space is dimensioned to be slightly less than the engagement section and can be thermally expanded to be larger than the engagement section by heating the enveloping part to reach a predetermined temperature difference over the enveloped part, so that the engagement section can be put into the holding space. When the enveloping part is cooled, the holding space can shrink, causing the enveloping part to tightly hold the engagement section. The low heat transfer layer, which has a thermal conductivity less than each of the two parts, is disposed in the holding space, between the engagement section and the enveloping part.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: November 8, 2022
    Assignee: Mintron Energy Technology Co., Ltd.
    Inventors: Chia-Ming Chuang, Chen-Sheng Huang
  • Patent number: 11454459
    Abstract: A heat-sink base provided with heat-sink fin portions, a manufacturing method and a motor provided with the heat-sink base. The base is produced by pouring cast metal into a mold cavity to replace a pattern having a predetermined sublimation temperature. The base includes a preformed heat-sink member comprising a plurality of heat-sink fin portions and at least one anchor portion embedded at least partially in the pattern, and a base body comprising an enclosed base portion and a holder portion for receiving and holding the at least one anchor portion. By virtue of the invented method, the heat-sink member having an extremely thin thickness can be mounted on the base body and the overall surface area of the heat-sink base is increased considerably.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: September 27, 2022
    Assignee: Atieva, Inc.
    Inventor: Chia-Ming Chuang
  • Publication number: 20220198389
    Abstract: Disclosed is reconfigurable decentralized freight shipping system, configured for a shipper to send at least one shipment to a predetermined target, including: at least one freight terminal configured for receiving a plurality of shipment-loaded standard sized modular container; a plurality of transport means respectively having a wireless communication means and operating in respective operating areas, each of the operating areas being at least intersected with at least another one of the operating areas, and at least one computing server configured for computing the shipping information and the location information of the wireless communication means to work out a delivery solution, transmitting delivery information corresponding to the delivery solution to the transport means, and updating the delivery solution based on the updated shipping information changed by the shipper and/or the recipient destination.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Chia-Ming Chuang, Chen-Sheng Huang
  • Patent number: 11244172
    Abstract: An time variant geographical information acquisition system for mobile vehicles and the system thereof is disclosed, which provides the time variant geographic information system to at least one mobile vehicle located in the aforementioned three-dimensional space, wherein the system comprises: a plurality of image capturing apparatus, at least one monitoring host and at least one time variant geographical information acquisition system for mobile vehicles installed on the above-said mobile vehicle, in which the data capture device includes: a wireless communication unit, connected to the image capturing apparatus and/or the monitoring host; a timing unit, used to output a timing signal in cooperation with the wireless communication unit; a memory module, storing the geographic information corresponding to at least the aforementioned mobile vehicle in the three-dimensional space; and a traffic scenario output interface, collectively displaying the geographic information and the time variant object information.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: February 8, 2022
    Assignee: Mintron Energy Technology Co., Ltd.
    Inventors: Chen-Sheng Huang, Chia-Ming Chuang
  • Publication number: 20210216956
    Abstract: An unmanned handling unit for a reconfigurable decentralized shipping system operates whereby a shipper first selects a freight container module of one of a plurality of sizes to pack at least one item, and then ships it to a predetermined target; the shipper inputs shipping information to the shipping system; when the shipper and/or the predetermined target modifies the shipping information, delivery is modified in real time.
    Type: Application
    Filed: December 23, 2020
    Publication date: July 15, 2021
    Inventors: Chia-Ming Chuang, Chen-Sheng Huang
  • Publication number: 20210210810
    Abstract: A thermal management system for high power electrical equipment includes temperature adjustment means, sensing means, and a microcontroller. The temperature adjustment means includes small and large temperature adjustment units and a selection device, wherein the small and large temperature adjustment units are thermally connected to the battery cells and the battery enclosure, respectively. The sensing means includes temperature sensors for measuring the temperatures of the battery cells, and capacity sensors for measuring the remaining capacities of the battery cells available for the electrical equipment, wherein the temperature and capacity sensors can output corresponding signals. The microcontroller receives the signals from the temperature and capacity sensors, and enables or disenables the temperature adjustment means according to the temperature signals.
    Type: Application
    Filed: November 12, 2018
    Publication date: July 8, 2021
    Inventor: Chia-Ming Chuang