Abstract: Many unsupervised domain adaptation (UDA) methods have been proposed to bridge the domain gap by utilizing domain invariant information. Most approaches have chosen depth as such information and achieved remarkable successes. Despite their effectiveness, using depth as domain invariant information in UDA tasks may lead to multiple issues, such as excessively high extraction costs and difficulties in achieving a reliable prediction quality. As a result, we introduce Edge Learning based Domain Adaptation (ELDA), a framework which incorporates edge information into its training process to serve as a type of domain invariant information. Our experiments quantitatively and qualitatively demonstrate that the incorporation of edge information is indeed beneficial and effective, and enables ELDA to outperform the contemporary state-of-the-art methods on two commonly adopted benchmarks for semantic segmentation based UDA tasks.

Abstract: A semiconductor structure includes a die embedded in a molding material, the die having die connectors on a first side; a first redistribution structure at the first side of the die, the first redistribution structure being electrically coupled to the die through the die connectors; a second redistribution structure at a second side of the die opposing the first side; and a thermally conductive material in the second redistribution structure, the die being interposed between the thermally conductive material and the first redistribution structure, the thermally conductive material extending through the second redistribution structure, and the thermally conductive material being electrically isolated.

Abstract: A semiconductor device includes an insulating base layer, a semiconductor layer, an insulating layer, an isolation trench and a gettering site. The semiconductor layer and the insulating layer are disposed on the insulating base layer in sequence, and the isolation trench is disposed in the semiconductor layer and passes through the insulating layer. The isolation trench includes a first cross-section, a second cross-section and a third cross-section from top to bottom. The first cross-section is higher than the bottom surface of the insulating layer, and the second cross-section and the third cross-section are lower than the bottom surface of the insulating layer. The gettering site is disposed in the semiconductor layer and in contact with the isolation trench, and the vertex of the gettering site is lower than the second cross-section.

Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first doped region formed in the substrate, a second doped region formed in the substrate and surrounding the first doped region, and a plurality of strip third doped regions formed in the substrate and located underneath the first doped region and the second doped region. In addition, the first doped region has a doping type which is the opposite of that of the second doped region. The strip third doped region has a doping type which is the same as that of the second doped region.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of strip first doped regions formed in the substrate, a plurality of strip second doped regions formed in the substrate and respectively located between the strip first doped regions, a third doped region formed in the substrate and surrounding the strip first doped regions and the strip second doped regions, and a fourth doped region formed in the substrate and located underneath the strip first doped regions, the strip second doped regions and the third doped region. The doping type of the strip first doped region is the opposite of that of the strip second doped region. The doping type of the third doped region is the same as that of the strip second doped region. The doping type of the fourth doped region is the same as that of the strip second doped region.

Abstract: A semiconductor device includes a substrate and a conducting structure. The substrate has a first conductivity type and includes a first isolation region, a first implant region, and a second implant region. The first isolation region is disposed along the circumference of the substrate. The first implant region has the first conductivity type, and the second implant region has a second conductivity type that is the opposite of the first conductivity type. The conducting structure is disposed on the substrate, and at least a portion of the conducting structure is located on the first isolation region.

Abstract: A semiconductor device includes a substrate and a conducting structure. The substrate has a first conductivity type and includes a first isolation region, a first implant region, and a second implant region. The first isolation region is disposed along the circumference of the substrate. The first implant region has the first conductivity type, and the second implant region has a second conductivity type that is the opposite of the first conductivity type. The conducting structure is disposed on the substrate, and at least a portion of the conducting structure is located on the first isolation region.

Abstract: An inductor structure formed on a substrate and extending in a quadrant comprising a first domain, a second domain, a third domain and a fourth domain is provided. The inductor structure comprises an input conducting wire, an output conducting wire and a conducting wire. The conducting wire is coupled between the input conducting wire and the output conducting wire. A first portion of the conducting wire is extended from a start terminal, to the second domain, to the fourth domain, to a stop terminal. A second portion of the conducting wire is extended from the start terminal, to the third domain, to the first domain, to the stop terminal.

Abstract: An inductor structure formed on a substrate and extending in a quadrant comprising a first domain, a second domain, a third domain and a fourth domain is provided. The inductor structure comprises an input conducting wire, an output conducting wire and a conducting wire. The conducting wire is coupled between the input conducting wire and the output conducting wire. A first portion of the conducting wire is extended from a start terminal, to the second domain, to the fourth domain, to a stop terminal. A second portion of the conducting wire is extended from the start terminal, to the third domain, to the first domain, to the stop terminal.