Patents by Inventor Chia-Wei Liang
Chia-Wei Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11972974Abstract: An IC structure includes a transistor, a source/drain contact, a metal oxide layer, a non-metal oxide layer, a barrier structure, and a via. The transistor includes a gate structure and source/drain regions on opposite sides of the gate structure. The source/drain contact is over one of the source/drain regions. The metal oxide layer is over the source/drain contact. The non-metal oxide layer is over the metal oxide layer. The barrier structure is over the source/drain contact. The barrier structure forms a first interface with the metal oxide layer and a second interface with the non-metal oxide layer, and the second interface is laterally offset from the first interface. The via extends through the non-metal oxide layer to the barrier structure.Type: GrantFiled: January 13, 2022Date of Patent: April 30, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Sung-Li Wang, Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu, Mrunal Abhijith Khaderbad, Keng-Chu Lin
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Publication number: 20240120388Abstract: Provided are structures and methods for forming structures with sloping surfaces of a desired profile. An exemplary method includes performing a first etch process to differentially etch a gate material to a recessed surface, wherein the recessed surface includes a first horn at a first edge, a second horn at a second edge, and a valley located between the first horn and the second horn; depositing an etch-retarding layer over the recessed surface, wherein the etch-retarding layer has a central region over the valley and has edge regions over the horns, and wherein the central region of the etch-retarding layer is thicker than the edge regions of the etch-retarding layer; and performing a second etch process to recess the horns to establish the gate material with a desired profile.Type: ApplicationFiled: January 18, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Jih-Sheng Yang, Shih-Chieh Chao, Chia Ming Liang, Yih-Ann Lin, Ryan Chia-Jen Chen
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Publication number: 20240096998Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.Type: ApplicationFiled: November 21, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shuen-Shin LIANG, Chij-chien CHI, Yi-Ying LIU, Chia-Hung CHU, Hsu-Kai CHANG, Cheng-Wei CHANG, Chein-Shun LIAO, Keng-chu LIN, KAi-Ting HUANG
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Publication number: 20240077479Abstract: A detection system and method for the migrating cell is provided. The system is configured to detect a migrating cell combined with an immunomagnetic bead. The system includes a platform, a microchannel, a magnetic field source, a coherent light source and an optical sensing module. The microchannel is configured to allow the migrating cell to flow in it along a flow direction. The magnetic field source is configured to provide magnetic force to the migrating cell combined with the immunomagnetic bead. The magnetic force includes at least one magnetic force component and the magnetic force component is opposite to the flow direction of the microchannel. The coherent light source is configured to provide the microchannel with the coherent light. The optical sensing module is configured to receive the interference light caused by the coherent light being reflected by the sample inside the microchannel.Type: ApplicationFiled: August 10, 2023Publication date: March 7, 2024Applicant: DeepBrain Tech. IncInventors: Han-Lin Wang, Chia-Wei Chen, Yao-Wen Liang, Ting-Chun Lin, Yun-Ting Kuo, You-Yin Chen, Yu-Chun Lo, Ssu-Ju Li, Ching-Wen Chang, Yi-Chen Lin
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Publication number: 20240072170Abstract: A semiconductor device is disclosed. The semiconductor device includes a semiconductor fin. The semiconductor device includes first spacers over the semiconductor fin. The semiconductor device includes a metal gate structure, over the semiconductor fin, that is sandwiched at least by the first spacers. The semiconductor device includes a gate electrode contacting the metal gate structure. An interface between the metal gate structure and the gate electrode has its side portions extending toward the semiconductor fin with a first distance and a central portion extending toward the semiconductor fin with a second distance, the first distance being substantially less than the second distance.Type: ApplicationFiled: August 24, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Yu-Shih Wang, Yih-Ann Lin, Chia Ming Liang, Ryan Chia-Jen CHEN
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Publication number: 20230074456Abstract: An emulation system traverses trace buffers to read data captured from a design under test (DUT). The emulation system receives a request to read at least a portion of DUT data. The emulation system reads a header of the latest sample of the DUT data, where header of each sample of the DUT data includes one or more pointers to a previously stored sample. The samples of the DUT data are partitioned into frames and sectors. The emulation system can identify samples of the DUT data using the pointers in the header of the samples and compare time stamps of the samples against a specified time stamp in the received request. After identifying a sample having the specified time stamp, the emulation system may read the sample for output to the user (e.g., reconstructing a waveform using the sample).Type: ApplicationFiled: September 6, 2022Publication date: March 9, 2023Inventors: Chia-Wei Liang, Wenxin Wang, Meng-Tse Chen, Goichiro Ono, Zhe Zhao, Yang Song, Yu Sui, Yuchen Xu
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Publication number: 20220059222Abstract: The present disclosure provides computed-implemented method and computing device for predicting cancer. The computing device: retrieves an electronic medical record of a user from a database; transform the electronic medical record into a matrix; and determine a cancer prediction result corresponding to the matrix according to a cancer prediction model.Type: ApplicationFiled: August 24, 2020Publication date: February 24, 2022Inventors: Yu-Chuan LI, Hsuan-Chia YANG, Chih-Wei HUANG, Phung Anh NGUYEN, Chia-Wei LIANG
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Publication number: 20130234314Abstract: A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.Type: ApplicationFiled: April 24, 2013Publication date: September 12, 2013Applicant: NATIONAL CHIAO TUNG UNIVERSITYInventors: TZU-YUAN CHAO, CHIA-WEI LIANG, YU-TING CHENG
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Patent number: 8481364Abstract: A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.Type: GrantFiled: October 7, 2010Date of Patent: July 9, 2013Assignee: National Chiao Tung UniversityInventors: Tzu-Yuan Chao, Chia-Wei Liang, Yu-Ting Cheng
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Publication number: 20120140607Abstract: A signal processing apparatus for an optical disc with a first type region and a second type region is disclosed. The signal processing apparatus comprises: a determining unit, arranged to determine that an input signal is a first type input signal derived from the first type region or a second type input signal derived from the second type region; a peak-bottom detector, arranged to detect a peak-bottom value of the input signal; and a control circuit arranged to determine that the peak-bottom value is derived from the first type input signal or the second type input signal according to a determining result from the determining unit.Type: ApplicationFiled: February 7, 2012Publication date: June 7, 2012Inventors: Chia-Wei Liang, Yu-Shu Chien
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Publication number: 20120032320Abstract: A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.Type: ApplicationFiled: October 7, 2010Publication date: February 9, 2012Applicant: NATIONAL CHIAO TUNG UNIVERSITYInventors: TZU-YUAN CHAO, CHIA-WEI LIANG, YU-TING CHENG
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Publication number: 20110243270Abstract: An exemplary signal processing apparatus includes a signal transmission port, a first signal processing circuit, a second signal processing circuit, and a control circuit. The signal transmission port is shared between a first signal processing operation and a second signal processing operation. The first signal processing circuit performs the first signal processing operation, wherein when the signal processing apparatus operates, the first signal processing circuit is not required to be consistently enabled to use the signal transmission port for signal transmission. The second signal processing circuit performs the second signal processing operation, wherein the signal transmission port is not always required to carry out signal transmission each time the second signal processing circuit is enabled to perform the second signal processing operation. The control circuit selectively enables the first signal processing circuit or the second signal processing circuit.Type: ApplicationFiled: December 8, 2010Publication date: October 6, 2011Inventors: Kuan-Kai Juan, Chia-Wei Liang, Feng-Fu Lin, Ming-Jiou Yu, Cheng-Chung Kuo, Shy-Junn Hsiao
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Publication number: 20090196133Abstract: A signal processing apparatus for an optical disc with a first type region and a second type region includes a processing module and a determining unit. The processing module is used for transforming an input signal to generate a first output signal according to a first amplifying gain, or to amplify the input signal to generate a second output signal according to a second amplifying gain, wherein the input signal is derived from an optical pickup head. The determining unit is coupled to the processing module and arranged to control the processing module to output the first output signal when the input signal is derived from the first type region. Also, the determining unit outputs the second output signal when the input signal is derived from the second type region.Type: ApplicationFiled: December 30, 2008Publication date: August 6, 2009Inventors: Chia-Wei Liang, Yu-Shu Chien
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Patent number: 7453775Abstract: A method for dynamically adjusting a header region RF gain of a variable gain amplifier while accessing header regions of a DVD-RAM disc, and apparatus thereof. The method includes the following steps: irradiating a light spot on the DVD-RAM disc with a pickup head; detecting a 4T peak-to-peak level of a RF signal generated by the variable gain amplifier while the light spot is moving within a VFO1 column of a header region of the DVD-RAM disc; comparing the 4T peak-to-peak level with a target level; adjusting a header region RF gain of the variable gain amplifier according to a result of the comparing step.Type: GrantFiled: April 25, 2005Date of Patent: November 18, 2008Assignee: Mediatek IncorporationInventors: Chia-Wei Liang, Hsueh-Wu Kao
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Publication number: 20050254368Abstract: A method for dynamically adjusting a header region RF gain of a variable gain amplifier while accessing header regions of a DVD-RAM disc, and apparatus thereof. The method includes the following steps: irradiating a light spot on the DVD-RAM disc with a pickup head; detecting a 4T peak-to-peak level of a RF signal generated by the variable gain amplifier while the light spot is moving within a VFO1 column of a header region of the DVD-RAM disc; comparing the 4T peak-to-peak level with a target level; adjusting a header region RF gain of the variable gain amplifier according to a result of the comparing step.Type: ApplicationFiled: April 25, 2005Publication date: November 17, 2005Inventors: Chia-Wei Liang, Hsueh-Wu Kao