Patents by Inventor Chia-Yang Wu
Chia-Yang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136291Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.Type: ApplicationFiled: January 12, 2023Publication date: April 25, 2024Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
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Patent number: 11967272Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.Type: GrantFiled: December 9, 2022Date of Patent: April 23, 2024Assignees: AUO Corporation, National Cheng-Kung UniversityInventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng
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Patent number: 11929328Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.Type: GrantFiled: January 4, 2021Date of Patent: March 12, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chia-Yang Wu, Shiu-Ko JangJian, Ting-Chun Wang, Yung-Si Yu
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Publication number: 20240079332Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.Type: ApplicationFiled: November 8, 2023Publication date: March 7, 2024Inventors: Chia-Yang Wu, Shiu-Ko JangJian, Ting-Chun Wang, Yung-Si Yu
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Patent number: 11784240Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a contact layer over a metal silicide layer. The contact layer extends through a first dielectric structure. The semiconductor device structure includes a first metal nitride barrier layer over sidewalls of the contact layer. The first metal nitride barrier layer is directly adjacent to the first dielectric structure. The semiconductor device structure includes a second metal nitride barrier layer partially between the contact layer and the metal silicide layer and partially between the contact layer and the first metal nitride barrier layer. The metal silicide layer is below the first metal nitride barrier layer and the second metal nitride barrier layer.Type: GrantFiled: June 6, 2022Date of Patent: October 10, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chia-Yang Wu, Shiu-Ko Jangjian, Ting-Chun Wang, Yung-Si Yu
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Publication number: 20230268425Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a dielectric structure over the substrate. The semiconductor device structure includes a contact structure passing through the dielectric structure. The contact structure includes a contact layer, a first barrier layer, and a second barrier layer, the contact layer passes through the first barrier layer, the first barrier layer passes through the second barrier layer, the first barrier layer surrounds the contact layer, the second barrier layer surrounds a first upper portion of a sidewall of the first barrier layer and exposes a first lower portion of the sidewall of the first barrier layer, and the sidewall faces away from the contact layer.Type: ApplicationFiled: April 26, 2023Publication date: August 24, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Yang WU, Shiu-Ko JANGJIAN, Ting-Chun WANG, Yung-Si YU
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Publication number: 20230268402Abstract: A semiconductor device includes a source/drain region, a silicide region, a source/drain contact, and a silicon-containing dielectric liner. The source/drain region is in a substrate. The silicide region is embedded in the source/drain region. The source/drain contact is over the silicide region. The silicon-containing dielectric liner surrounds the source/drain contact. The source/drain region is in contact with an outer sidewall of the silicon-containing dielectric liner but separated from a bottom surface of the silicon-containing dielectric liner by the silicide region.Type: ApplicationFiled: April 28, 2023Publication date: August 24, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chi-Cheng HUNG, Kei-Wei CHEN, Yu-Sheng WANG, Ming-Ching CHUNG, Chia-Yang WU
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Patent number: 11670704Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a dielectric structure over the substrate. The semiconductor device structure includes a contact structure passing through the dielectric structure. The contact structure includes a contact layer, a first barrier layer, and a second barrier layer. The first barrier layer surrounds the contact layer, the second barrier layer surrounds a first upper portion of the first barrier layer, the contact layer passes through the first barrier layer and extends into the dielectric structure, and the first barrier layer passes through the second barrier layer and extends into the dielectric structure.Type: GrantFiled: June 7, 2021Date of Patent: June 6, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Yang Wu, Shiu-Ko Jangjian, Ting-Chun Wang, Yung-Si Yu
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Patent number: 11670690Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a first source/drain region, a second source/drain region, first source/drain contact and a first dielectric spacer liner. The gate structure is over the semiconductor substrate. The first source/drain region and the second source/drain region are in the semiconductor substrate and respectively on opposite sides of the gate structure. The first source/drain contact is over the first source/drain region. The first dielectric spacer liner lines a sidewall of the first source/drain contact and extends into the first source/drain region.Type: GrantFiled: July 11, 2020Date of Patent: June 6, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chi-Cheng Hung, Kei-Wei Chen, Yu-Sheng Wang, Ming-Ching Chung, Chia-Yang Wu
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Publication number: 20220325172Abstract: A method for preparing a carbon nanodot-fluorescent polymer composite includes subjecting a reactant and a biological component to a reaction at 260° C. to 290° C., so as to obtain the carbon nanodot-fluorescent polymer composite containing a polymer and carbon nanodots dispersed in the polymer. The biological component includes at least one of collagen, chitin, gelatin, and sodium alginate. The reactant is selected from a reaction component or a polycondensate formed therefrom. The reaction component includes terephthalic acid having carboxylic acid groups and ethylene glycol capable of reacting with such groups. Also disclosed are the carbon nanodot-fluorescent polymer composite and a carbon nanodot-fluorescent composite fiber including the same.Type: ApplicationFiled: April 7, 2022Publication date: October 13, 2022Applicant: TAINAN SPINNING CO., LTD.Inventors: Wei-Yu Chen, Ya-Yun Ho, Cheng-Ho Chen, Zong-Han Wu, Chia-Yang Wu, Yen-Chou Chen
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Publication number: 20220302283Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a contact layer over a metal silicide layer. The contact layer extends through a first dielectric structure. The semiconductor device structure includes a first metal nitride barrier layer over sidewalls of the contact layer. The first metal nitride barrier layer is directly adjacent to the first dielectric structure. The semiconductor device structure includes a second metal nitride barrier layer partially between the contact layer and the metal silicide layer and partially between the contact layer and the first metal nitride barrier layer. The metal silicide layer is below the first metal nitride barrier layer and the second metal nitride barrier layer.Type: ApplicationFiled: June 6, 2022Publication date: September 22, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Yang WU, Shiu-Ko JANGJIAN, Ting-Chun WANG, Yung-Si YU
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Patent number: 11270888Abstract: A device includes a source/drain (S/D) in a substrate and adjacent to a gate structure, wherein the S/D comprises a protrusion extending from a top surface of the S/D, and the protrusion has a tapered profile. The device further includes a contact plug electrically connected to the protrusion.Type: GrantFiled: May 7, 2020Date of Patent: March 8, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chia-Yang Wu, Shiu-Ko Jangjian, Keng-Chuan Chang, Ting-Siang Su
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Publication number: 20210296472Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a dielectric structure over the substrate. The semiconductor device structure includes a contact structure passing through the dielectric structure. The contact structure includes a contact layer, a first barrier layer, and a second barrier layer. The first barrier layer surrounds the contact layer, the second barrier layer surrounds a first upper portion of the first barrier layer, the contact layer passes through the first barrier layer and extends into the dielectric structure, and the first barrier layer passes through the second barrier layer and extends into the dielectric structure.Type: ApplicationFiled: June 7, 2021Publication date: September 23, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Yang WU, Shiu-Ko JANGJIAN, Ting-Chun WANG, Yung-Si YU
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Patent number: 11031488Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a transistor over a substrate. The semiconductor device structure includes a dielectric structure over the substrate and covering the transistor. The semiconductor device structure includes a contact structure passing through the dielectric structure and electrically connected to the transistor. The contact structure includes a contact layer, a first barrier layer, and a second barrier layer, the first barrier layer surrounds the contact layer, the second barrier layer surrounds a first upper portion of the first barrier layer, a first lower portion of the first barrier layer is in direct contact with the dielectric structure, and a thickness of the first lower portion increases toward the substrate.Type: GrantFiled: April 20, 2020Date of Patent: June 8, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chia-Yang Wu, Shiu-Ko Jangjian, Ting-Chun Wang, Yung-Si Yu
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Publication number: 20210125935Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.Type: ApplicationFiled: January 4, 2021Publication date: April 29, 2021Inventors: Chia-Yang Wu, Shiu-Ko JangJian, Ting-Chun Wang, Yung-Si Yu
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Patent number: 10886226Abstract: A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.Type: GrantFiled: July 31, 2018Date of Patent: January 5, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO, LTD.Inventors: Chia-Yang Wu, Shiu-Ko JangJian, Ting-Chun Wang, Yung-Si Yu
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Publication number: 20200343349Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a first source/drain region, a second source/drain region, first source/drain contact and a first dielectric spacer liner. The gate structure is over the semiconductor substrate. The first source/drain region and the second source/drain region are in the semiconductor substrate and respectively on opposite sides of the gate structure. The first source/drain contact is over the first source/drain region. The first dielectric spacer liner lines a sidewall of the first source/drain contact and extends into the first source/drain region.Type: ApplicationFiled: July 11, 2020Publication date: October 29, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chi-Cheng HUNG, Kei-Wei CHEN, Yu-Sheng WANG, Ming-Ching CHUNG, Chia-Yang WU
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Patent number: 10763338Abstract: The present disclosure describes a silicide formation process which employs the formation of an amorphous layer in the SiGe S/D region via an application of a substrate bias voltage during a metal deposition process. For example, the method includes a substrate with a gate structure disposed thereon and a source/drain region adjacent to the gate structure. A dielectric is formed over the gate structure and the source-drain region. A contact opening is formed in the dielectric to expose a portion of the gate structure and a portion of the source/drain region. An amorphous layer is formed in the exposed portion of the source/drain region with a thickness and a composition which is based on an adjustable bias voltage applied to the substrate. Further, an anneal is performed to form a silicide on the source/drain region.Type: GrantFiled: August 30, 2017Date of Patent: September 1, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chia-Yang Wu, Shiu-Ko Jang-Jian, Ting-Chun Wang, Chuan-Pu Liu
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Publication number: 20200266069Abstract: A device includes a source/drain (S/D) in a substrate and adjacent to a gate structure, wherein the S/D comprises a protrusion extending from a top surface of the S/D, and the protrusion has a tapered profile. The device further includes a contact plug electrically connected to the protrusion.Type: ApplicationFiled: May 7, 2020Publication date: August 20, 2020Inventors: Chia-Yang WU, Shiu-Ko JANGJIAN, Keng-Chuan CHANG, Ting-Siang SU
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Publication number: 20200251577Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a transistor over a substrate. The semiconductor device structure includes a dielectric structure over the substrate and covering the transistor. The semiconductor device structure includes a contact structure passing through the dielectric structure and electrically connected to the transistor. The contact structure includes a contact layer, a first barrier layer, and a second barrier layer, the first barrier layer surrounds the contact layer, the second barrier layer surrounds a first upper portion of the first barrier layer, a first lower portion of the first barrier layer is in direct contact with the dielectric structure, and a thickness of the first lower portion increases toward the substrate.Type: ApplicationFiled: April 20, 2020Publication date: August 6, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chia-Yang WU, Shiu-Ko JANGJIAN, Ting-Chun WANG, Yung-Si YU