Patents by Inventor Chia-Ying Hsieh

Chia-Ying Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11924964
    Abstract: Devices and methods are described for reducing etching due to Galvanic Effect within a printed circuit board (PCB) that may be used in an electronic device. Specifically, a contact trace is coupled to a contact finger that has a substantially larger surface area than the contact trace. The contact finger is configured to couple the electronic device to a host device. The contact trace is electrically isolated from the rest of the PCB circuitry during a fabrication process by a separation distance between an exposed portion of the contact trace and an impedance trace. The contact finger and the exposed portion of the contact trace are plated with a common material to reduce galvanic etching of the contact trace during fabrication. The contact trace is then connected to the impedance trace using a solder joint.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 5, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Lin Hui Chen, Songtao Lu, Chien Te Chen, Yu Ying Tan, Huang Pao Yi, Ching Chuan Hsieh, T. Sharanya Kaminda, Chia-Hsuan Huang
  • Publication number: 20230142987
    Abstract: The present invention provides modified monocytes, modified macrophages, pharmaceutical compositions comprising the modified monocytes or modified macrophages described herein and at least one pharmaceutically acceptable carrier or excipient. Uses of the modified monocytes or the modified macrophages for the treatment of musculoskeletal diseases and inducing cartilage formation are provided. Also disclosed herein are in vitro culture methods for generating the modified macrophages.
    Type: Application
    Filed: April 19, 2021
    Publication date: May 11, 2023
    Inventors: Hong-Lin SU, Ching-I SHEN, Fu-Hui WANG, Chia-Ying HSIEH, Masataka KIYOKAWA
  • Publication number: 20230063213
    Abstract: An image object labeling method and system are disclosed. The method is executed by a processor coupled to a memory and includes providing an image file; detecting at least one first object on the image file and generating at least one graphic block and attribute thereof; performing a binarization process to present a first graphic feature on a region containing the graphic block in the image file and a second graphic feature on the rest region; combining the results of detecting and the binarization process, and filtering the image file through several gradually reduced masks to show several separated graphic components until number of the separated graphic components and the at least one graphic block are the same; and assigning a label to the separated graphic components according to the attribute, alternatively, outputting a message, receiving a command for adjusting the graphic block and attribute thereof, as the labels.
    Type: Application
    Filed: September 1, 2021
    Publication date: March 2, 2023
    Inventors: Yan-Jhih WANG, Chia-Ying HSIEH, Yu-Siang FAN JIANG, Tzung-Pei HONG, Shih-Feng HUANG
  • Publication number: 20230060459
    Abstract: An image object classification optimizing method and system are disclosed. The method is executed by a processor coupled to a memory. The method includes steps: providing an image file including at least one image object; performing a process of characteristics enhancement on the image object; performing a process of characteristics classification on the enhanced image object by an odd number of two-dimensional masks whose sizes are sequentially doubled, based on a plurality of characteristic parameters of a preferred classification model, to generate a plurality of classification results; and estimating variabilities of the plurality of classification results, sorting the variabilities, and selecting at least one of the classification results whose variability is lower than a variation tolerance as at least one optimization result, according to the sorting result.
    Type: Application
    Filed: September 1, 2021
    Publication date: March 2, 2023
    Inventors: Yan-Jhih WANG, Po-Hung LIN, Chia-Ying HSIEH, Yu-Siang FAN JIANG, Jiun-Huei HO
  • Publication number: 20140060427
    Abstract: A crystal growing device includes a furnace, a platform, a crucible, a heating unit, a heat transmitting block, and a heat exchanger. The furnace defines a chamber therein. The platform is disposed in the chamber and has a top surface and a bottom surface. The crucible is disposed on the top surface of the platform for receiving a crystal seed layer and a raw material therein. The heating unit is disposed in the chamber and surrounds the crucible. The heat transmitting block is disposed at the bottom surface of the platform and is made of a material with high thermal conductivity. The heat exchanger is coupled to the heat transmitting block for absorbing heat from the heat transmitting block.
    Type: Application
    Filed: January 29, 2013
    Publication date: March 6, 2014
    Applicant: C Sun Mfg. Ltd.
    Inventors: Jen-Pin YU, Chen-Wei CHANG, Chia-Ying HSIEH
  • Publication number: 20130152850
    Abstract: In a method for monitoring and controlling crystal growth during a crystal growing procedure, heights of a plurality of measuring points on a solid-liquid interface of a crystal material disposed in a crucible are measured, and at least one parameter of the crystal growing procedure is optimized based on the measured heights, so that the solid-liquid interface maintains a dome shape with a predetermined curvature during the crystal growing procedure.
    Type: Application
    Filed: July 23, 2012
    Publication date: June 20, 2013
    Inventors: Chia-Ying Hsieh, Chi-Hao Chang, Hsin-Hwa Hu