Patents by Inventor Chia-Yun Cheng

Chia-Yun Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11949920
    Abstract: A video decoding method includes: before residual decoding of a coding unit is completed, referring to available information to determine whether to decode information that an inverse transform (IT) circuit needs for applying inverse transform to transform blocks of the coding unit, and generating a determination result; and controlling coefficient transmission of the coding unit to the IT circuit according to the determination result.
    Type: Grant
    Filed: July 24, 2022
    Date of Patent: April 2, 2024
    Assignee: MEDIATEK INC.
    Inventors: Ming-Hsien Lai, Min-Hao Chiu, Chia-Yun Cheng
  • Publication number: 20230402312
    Abstract: A method includes: applying a first solution to a semiconductor structure of a semiconductor device to form a first coating, the semiconductor structure including a feature and the trench, the first coating being formed in the trench and over the feature, the first solution containing a metal-containing solute; heating the first coating in a multi-step procedure to turn the first coating into a first film, the multi-step procedure including heating at a first temperature, followed by heating at a second temperature not lower than the first temperature; applying a second solution onto the first film to form a second coating, the second solution containing the metal-containing solute; and heating the second coating in a multi-step procedure to turn the second coating into a second film, the multi-step procedure including heating at a third temperature, followed by heating at a fourth temperature not lower than the third temperature.
    Type: Application
    Filed: June 9, 2022
    Publication date: December 14, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kenichi SANO, Andrew Joseph KELLY, Yu-Wei LU, Chin-Hsiang LIN, Chia-Yun CHENG
  • Publication number: 20230122258
    Abstract: A video decoding method includes: before residual decoding of a coding unit is completed, referring to available information to determine whether to decode information that an inverse transform (IT) circuit needs for applying inverse transform to transform blocks of the coding unit, and generating a determination result; and controlling coefficient transmission of the coding unit to the IT circuit according to the determination result.
    Type: Application
    Filed: July 24, 2022
    Publication date: April 20, 2023
    Applicant: MEDIATEK INC.
    Inventors: Ming-Hsien Lai, Min-Hao Chiu, Chia-Yun Cheng
  • Publication number: 20230100895
    Abstract: A video processing circuit includes a first buffer and a computation circuit. Before a second one-dimensional processing operation is performed upon a plurality of consecutive blocks in a second direction, the first computation circuit generates a first processing result for each of the plurality of consecutive blocks by performing a first one-dimensional processing operation upon each of the plurality of consecutive blocks in a first direction that is different from the second direction, and further stores a plurality of first processing results of the plurality of consecutive blocks into the first buffer.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 30, 2023
    Applicant: MEDIATEK INC.
    Inventors: Li-Ren Huang, Chia-Yun Cheng, Min-Hao Chiu, Hsueh-Yen Shen
  • Publication number: 20230059794
    Abstract: A context-based adaptive binary arithmetic coding (CABAC) decoder includes a bin decode circuit and a context update circuit. The bin decode circuit supports decoding of multiple bins in one cycle. The multiple bins include a first bin and a second bin. The bin decode circuit generates a bin value of the first bin according to a first set of multiple contexts, a first range and a first offset, and generates one bin value of the second bin according to a second set of multiple contexts, a second range and a second offset. The context update circuit updates the first set of multiple contexts in response to the bin value of the first bin, to generate a first set of multiple updated contexts, and updates the second set of multiple contexts in response to said one bin value of the second bin, to generate a second set of multiple updated contexts.
    Type: Application
    Filed: July 1, 2022
    Publication date: February 23, 2023
    Applicant: MEDIATEK INC.
    Inventors: Sheng-Jen Wang, Chao-I Wu, Ming-Long Wu, Chia-Yun Cheng
  • Patent number: 11025947
    Abstract: A motion vector (MV) projection method includes generating motion field motion vectors (MFMVs) for a first portion of a current frame by applying MV projection to MVs of a portion of each of reference frames and storing the MFMVs of the first portion of the current frame into an MFMV buffer, and generating MFMVs for a second portion of the current frame by applying MV projection to MVs of a portion of each of the reference frames and storing the MFMVs of the second portion of the current frame into the MFMV buffer. The second portion does not overlap the first portion. Before generating the MFMVs for the second portion of the current frame is done, at least one of the MFMVs of the first portion is read from the MFMV buffer and involved in motion vector determination of at least one coding block included in the first portion.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: June 1, 2021
    Assignee: MEDIATEK INC.
    Inventors: Yung-Chang Chang, Chia-Yun Cheng, Cheng-Han Li, Hong-Cheng Lin, Chi-Hung Chen
  • Patent number: 10984832
    Abstract: A video processing system includes a storage device, a receiving circuit, an audio/video demultiplexing circuit, a video decoder, and a display engine. The storage device includes a data buffer, a bitstream buffer, and a display buffer. An output of the receiving circuit is written into the data buffer. An input of the audio/video demultiplexing circuit is read from the data buffer, and an output of the audio/video demultiplexing circuit is written into the bitstream buffer. An input of the video decoder is read from the bitstream buffer, and an output of the video decoder is written into the display buffer. An input of the display engine is read from the display buffer. Each of the data buffer, the bitstream buffer, and the display buffer is a ring buffer.
    Type: Grant
    Filed: January 5, 2020
    Date of Patent: April 20, 2021
    Assignee: MEDIATEK INC.
    Inventors: Ming-Long Wu, Chia-Yun Cheng, Yung-Chang Chang
  • Patent number: 10939102
    Abstract: A post processing apparatus includes a super-resolution (SR) filtering circuit and a loop restoration (LR) filtering circuit. The SR filtering circuit applies SR filtering to a processing result of a preceding circuit. The LR filtering circuit applies LR filtering to a processing result of the SR filtering circuit. Before the SR filtering circuit finishes SR filtering of all pixels of a frame that are generated by the preceding circuit, the LR filtering circuit starts LR filtering of pixels that are derived from applying SR filtering to pixels included in the frame.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: March 2, 2021
    Assignee: MEDIATEK INC.
    Inventors: Yung-Chang Chang, Chih-Ming Wang, Chia-Yun Cheng, Chi-Hung Chen, Kai-Chun Lin, Chih-Wen Yang, Hsuan-Wen Peng
  • Patent number: 10805611
    Abstract: A method and apparatus for video encoding or decoding used by a video encoder or decoder respectively. In one method, input data associated with a video sequence are received. A current sequence header for a current picture is determined. Whether the current sequence header corresponds to a first sequence header or a second sequence header is determined. If the current sequence header corresponds to the second sequence header, one or more syntax values of a syntax set associated with the first sequence header are assigned to corresponding one or more syntax values of the syntax set associated with the current sequence header. The current picture is then encoded or decoded according to the current sequence header.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: October 13, 2020
    Assignee: MediaTek Inc.
    Inventors: Min-Hao Chiu, Hsiu-Yi Lin, Chia-yun Cheng, Chih-Ming Wang, Yung-Chang Chang
  • Patent number: 10778980
    Abstract: An entropy decoding apparatus includes an entropy decoding circuit, a pre-fetch circuit, and a context pre-load buffer. The pre-fetch circuit pre-fetches at least one candidate context for entropy decoding of a part of an encoded bitstream of a frame before the entropy decoding circuit starts entropy decoding of the part of the encoded bitstream of the frame. The context pre-load buffer buffers the at least one candidate context. When a target context actually needed by entropy decoding of the part of the encoded bitstream of the frame is not available in the context pre-load buffer, the context pre-load buffer instructs the pre-fetch circuit to re-fetch the target context, and the entropy decoding circuit stalls entropy decoding of the part of the encoded bitstream of the frame.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: September 15, 2020
    Assignee: MEDIATEK INC.
    Inventors: Ming-Long Wu, Chia-Yun Cheng, Yung-Chang Chang
  • Patent number: 10771163
    Abstract: A decoding apparatus is used for decoding region of interest (ROI) regions in an image, and includes a storage device, a pre-processing circuit, a decoding circuit, and an information fetching circuit. The pre-processing circuit performs a syntax pre-parsing operation upon a bitstream to obtain necessary information of the ROI regions, and stores the necessary information into the storage device. The decoding circuit performs a decoding operation upon the bitstream to decode the ROI regions, wherein the decoding operation includes syntax parsing of the bitstream. The information fetching circuit reads and analyzes the necessary information, and delivers at least a portion of the necessary information to the decoding circuit. A processing time of obtaining necessary information of one ROI region at the pre-processing circuit overlaps a processing time of decoding another ROI region at the decoding circuit.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: September 8, 2020
    Assignee: MEDIATEK INC.
    Inventors: Min-Hao Chiu, Chia-Yun Cheng, Yung-Chang Chang
  • Publication number: 20200177909
    Abstract: A motion vector (MV) projection method includes generating motion field motion vectors (MFMVs) for a first portion of a current frame by applying MV projection to MVs of a portion of each of reference frames and storing the MFMVs of the first portion of the current frame into an MFMV buffer, and generating MFMVs for a second portion of the current frame by applying MV projection to MVs of a portion of each of the reference frames and storing the MFMVs of the second portion of the current frame into the MFMV buffer. The second portion does not overlap the first portion. Before generating the MFMVs for the second portion of the current frame is done, at least one of the MFMVs of the first portion is read from the MFMV buffer and involved in motion vector determination of at least one coding block included in the first portion.
    Type: Application
    Filed: November 26, 2019
    Publication date: June 4, 2020
    Inventors: Yung-Chang Chang, Chia-Yun Cheng, Cheng-Han Li, Hong-Cheng Lin, Chi-Hung Chen
  • Patent number: 10659794
    Abstract: A palette decoding apparatus includes a palette color storage device which stores palette colors, a color index storage device which stores color indices of pixels, and a palette value processing circuit which generates a palette value for each pixel by reading data from the color index storage device and the palette color storage device. A frame is divided into first coding units, and each first coding unit is sub-divided into one or more second coding units. Before a palette value of a last pixel in a first coding unit is generated by the palette value processing circuit, a palette value of a non-last pixel in the first coding unit is generated by the palette value processing circuit and used by a reconstruction circuit of the video decoder.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: May 19, 2020
    Assignee: MEDIATEK INC.
    Inventors: Chi-Min Chen, Min-Hao Chiu, Chia-Yun Cheng, Yung-Chang Chang
  • Publication number: 20200154108
    Abstract: An entropy decoding apparatus includes an entropy decoding circuit, a pre-fetch circuit, and a context pre-load buffer. The pre-fetch circuit pre-fetches at least one candidate context for entropy decoding of a part of an encoded bitstream of a frame before the entropy decoding circuit starts entropy decoding of the part of the encoded bitstream of the frame. The context pre-load buffer buffers the at least one candidate context. When a target context actually needed by entropy decoding of the part of the encoded bitstream of the frame is not available in the context pre-load buffer, the context pre-load buffer instructs the pre-fetch circuit to re-fetch the target context, and the entropy decoding circuit stalls entropy decoding of the part of the encoded bitstream of the frame.
    Type: Application
    Filed: November 7, 2019
    Publication date: May 14, 2020
    Inventors: Ming-Long Wu, Chia-Yun Cheng, Yung-Chang Chang
  • Publication number: 20200145658
    Abstract: A post processing apparatus includes a super-resolution (SR) filtering circuit and a loop restoration (LR) filtering circuit. The SR filtering circuit applies SR filtering to a processing result of a preceding circuit. The LR filtering circuit applies LR filtering to a processing result of the SR filtering circuit. Before the SR filtering circuit finishes SR filtering of all pixels of a frame that are generated by the preceding circuit, the LR filtering circuit starts LR filtering of pixels that are derived from applying SR filtering to pixels included in the frame.
    Type: Application
    Filed: October 28, 2019
    Publication date: May 7, 2020
    Inventors: Yung-Chang Chang, Chih-Ming Wang, Chia-Yun Cheng, Chi-Hung Chen, Kai-Chun Lin, Chih-Wen Yang, Hsuan-Wen Peng
  • Publication number: 20200143836
    Abstract: A video processing system includes a storage device, a receiving circuit, an audio/video demultiplexing circuit, a video decoder, and a display engine. The storage device includes a data buffer, a bitstream buffer, and a display buffer. An output of the receiving circuit is written into the data buffer. An input of the audio/video demultiplexing circuit is read from the data buffer, and an output of the audio/video demultiplexing circuit is written into the bitstream buffer. An input of the video decoder is read from the bitstream buffer, and an output of the video decoder is written into the display buffer. An input of the display engine is read from the display buffer. Each of the data buffer, the bitstream buffer, and the display buffer is a ring buffer.
    Type: Application
    Filed: January 5, 2020
    Publication date: May 7, 2020
    Inventors: Ming-Long Wu, Chia-Yun Cheng, Yung-Chang Chang
  • Publication number: 20190289320
    Abstract: In order to overcome the issue caused by a decoded block vector (BV) pointing to a reference block overlapping with an unavailable area, various methods are disclosed. According to one method, if the reference block overlaps with an unavailable area, the reference pixels in the unavailable area are generated for IntraBC prediction of the current block by padding from neighbouring available pixels. The padding can be done in the horizontal direction and then the vertical direction. The padding may also done in the vertical direction first and then horizontal direction. In another method, if the reference block overlaps with an unavailable area, the reference pixels in the unavailable area are generated for IntraBC prediction of the current block by using previous decoded pixels in the unavailable area. A pre-defined value may also be used for the unavailable area.
    Type: Application
    Filed: June 4, 2019
    Publication date: September 19, 2019
    Applicant: MEDIATEK INC.
    Inventors: Tzu-Der CHUANG, Chia-Yun CHENG, Han-Liang CHOU, Ching-Yeh CHEN, Yu-Chen SUN, Yu-Wen HUANG
  • Publication number: 20190281312
    Abstract: A palette decoding apparatus includes a palette color storage device which stores palette colors, a color index storage device which stores color indices of pixels, and a palette value processing circuit which generates a palette value for each pixel by reading data from the color index storage device and the palette color storage device. A frame is divided into first coding units, and each first coding unit is sub-divided into one or more second coding units. Before a palette value of a last pixel in a first coding unit is generated by the palette value processing circuit, a palette value of a non-last pixel in the first coding unit is generated by the palette value processing circuit and used by a reconstruction circuit of the video decoder.
    Type: Application
    Filed: March 6, 2019
    Publication date: September 12, 2019
    Inventors: Chi-Min Chen, Min-Hao Chiu, Chia-Yun Cheng, Yung-Chang Chang
  • Patent number: 10412390
    Abstract: A video encoder has a processing circuit and a universal binary entropy (UBE) syntax encoder. The processing circuit processes pixel data of a video frame to generate encoding-related data, wherein the encoding-related data comprise at least quantized transform coefficients. The UBE syntax encoder processes a plurality of syntax elements to generate UBE syntax data. The encoding-related data are represented by the syntax elements. The processing circuit operates according to a video coding standard. The video coding standard supports arithmetic encoding. The UBE syntax data contain no arithmetic-encoded syntax data.
    Type: Grant
    Filed: July 4, 2017
    Date of Patent: September 10, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ming-Long Wu, Tung-Hsing Wu, Li-Heng Chen, Ting-An Lin, Yi-Hsin Huang, Chung-Hua Tsai, Chia-Yun Cheng, Han-Liang Chou, Yung-Chang Chang
  • Patent number: 10397588
    Abstract: A method and apparatus of sharing an on-chip buffer or cache memory for a video coding system using coding modes including Inter prediction mode or Intra Block Copy (IntraBC) mode are disclosed. At least partial pre-deblocking reconstructed video data of a current picture is stored in an on-chip buffer or cache memory. If the current block is coded using IntraBC mode, the pre-deblocking reconstructed video data of the current picture stored in the on-chip buffer or cache memory are used to derive IntraBC prediction for the current block. In some embodiments, if the current block is coded using Inter prediction mode, Inter reference video data from the previous picture stored in the on-chip buffer or cache memory are used to derive Inter prediction for the current block. In another embodiment, the motion compensation/motion estimation unit is shared by the two modes.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: August 27, 2019
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Der Chuang, Ping Chao, Ching-Yeh Chen, Yu-Chen Sun, Chih-Ming Wang, Chia-Yun Cheng, Han-Liang Chou, Yu-Wen Huang