Patents by Inventor Chiaki Sasaoka
Chiaki Sasaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240014272Abstract: A semiconductor device includes a gallium nitride substrate and a pattern film disposed on a front surface of the gallium nitride substrate. In the gallium nitride substrate, a Young's modulus in a first direction along the front surface is larger than a Young's modulus in a second direction along the front surface and orthogonal to the first direction. A first ratio R1 obtained by dividing a dimension of the gallium nitride substrate in the first direction by a dimension of the gallium nitride substrate in the second direction and a second ratio R2 obtained by dividing a dimension of the pattern film in the first direction by a dimension of the pattern film in the second direction satisfy a relationship of R1<R2.Type: ApplicationFiled: July 3, 2023Publication date: January 11, 2024Inventors: Seiya HASEGAWA, Takashi USHIJIMA, Takashi ISHIDA, Shoichi ONDA, Chiaki SASAOKA, Jun KOJIMA
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Patent number: 11810783Abstract: A gallium nitride semiconductor device includes: a chip formation substrate made of gallium nitride and having one surface and an other surface opposite to the one surface; a one surface side element component disposed on the one surface and providing a component of an one surface side of a semiconductor element; and a metal film constituting a back surface electrode in contact with the other surface. The other surface has an irregularity provided by a plurality of convex portions with a trapezoidal cross section and a plurality of concave portions located between the convex portions; and an upper base surface of the trapezoidal cross section in each of the plurality of convex portions is opposed to the one surface.Type: GrantFiled: April 13, 2021Date of Patent: November 7, 2023Assignees: DENSO CORPORATION, HAMAMATSU PHOTONICS K.K., National University Corporation Tokai National Higher Education and Research SystemInventors: Chiaki Sasaoka, Jun Kojima, Shoichi Onda, Masatake Nagaya, Kazukuni Hara, Daisuke Kawaguchi
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Patent number: 11810821Abstract: A semiconductor chip includes: an epitaxial film made of gallium nitride; a semiconductor element disposed in the epitaxial film; a chip formation substrate including the epitaxial film and having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface; and a convex and a concavity on the side surface.Type: GrantFiled: April 13, 2021Date of Patent: November 7, 2023Assignees: DENSO CORPORATION, HAMAMATSU PHOTONICS K.K., National University Corporation Tokai National Higher Education and Research SystemInventors: Masatake Nagaya, Kazukuni Hara, Daisuke Kawaguchi, Toshiki Yui, Chiaki Sasaoka, Jun Kojima, Shoichi Onda
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Publication number: 20230326748Abstract: A manufacturing method of a semiconductor device, includes: forming a gas vent recess in a first surface of a compound semiconductor substrate, which includes a plurality of device regions adjacent to the first surface, along an interface between the plurality of device regions; forming an altered layer inside the compound semiconductor substrate to extend along the first surface at a depth corresponding to a range of a depth of the gas vent recess by applying a laser beam; dividing the compound semiconductor substrate at the altered layer into a first part including the first surface and a second part including a second surface of the compound semiconductor substrate opposite to the first surface; and forming a metal film to cover a divided surface of the first part while exposing the gas vent recess.Type: ApplicationFiled: March 23, 2023Publication date: October 12, 2023Inventors: SHOSUKE NAKABAYASHI, MASATAKE NAGAYA, CHIAKI SASAOKA, SHOICHI ONDA, JUN KOJIMA, DAISUKE KAWAGUCHI, RYUJI SUGIURA, TOSHIKI YUI, KEISUKE HARA, TOMOMI ARATANI
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Patent number: 11784039Abstract: A method for manufacturing a gallium nitride semiconductor device includes: preparing a gallium nitride wafer; forming an epitaxial growth film on the gallium nitride wafer to provide a processed wafer having chip formation regions; perform a surface side process on a one surface side of the processed wafer; removing the gallium nitride wafer and dividing the processed wafer into a chip formation wafer and a recycle wafer; and forming an other surface side element component on an other surface side of the chip formation wafer.Type: GrantFiled: April 13, 2021Date of Patent: October 10, 2023Assignees: DENSO CORPORATION, HAMAMATSU PHOTONICS K.K., National University Corporation Tokai National Higher Education and Research SystemInventors: Jun Kojima, Chiaki Sasaoka, Shoichi Onda, Masatake Nagaya, Kazukuni Hara, Daisuke Kawaguchi
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Publication number: 20230238281Abstract: A method of manufacturing a gallium nitride substrate includes preparation of a gallium nitride wafer, formation of a transformation layer, and formation of the gallium nitride substrate. The gallium nitride has a first main surface and a second main surface on a side opposite from the first main surface. The gallium nitride wafer is made of a hexagonal crystal, and each of the first main surface and the second main surface is a {1-100} m-plane of the hexagonal crystal. The transformation layer is formed along a planar direction of the gallium nitride wafer by emitting a laser beam into the gallium nitride wafer. The gallium nitride substrate is formed from the gallium nitride wafer by dividing the gallium nitride wafer at the transformation layer. In the formation of the transformation layer, the laser beam is emitted to form an irradiation mark for forming the transformation layer.Type: ApplicationFiled: January 12, 2023Publication date: July 27, 2023Inventors: MASATAKE NAGAYA, SHOSUKE NAKABAYASHI, DAISUKE KAWAGUCHI, TOSHIKI YUI, CHIAKI SASAOKA, SHOICHI ONDA, JUN KOJIMA
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Publication number: 20230230829Abstract: A method of manufacturing a semiconductor element includes formation of a modified layer, detection of a first region, and cutting of a semiconductor wafer. In the formation of the modified layer, a laser is irradiated on the semiconductor wafer to form the modified layer extending along a surface of the semiconductor wafer inside the semiconductor wafer. The surface of the semiconductor wafer includes a peripheral portion having the first region and a second region. The first region is a region in which the modified layer is not located, and the second region is a region in which the modified layer is formed. In the cutting of the semiconductor wafer, the semiconductor wafer is cut at the modified layer starting from the second region.Type: ApplicationFiled: December 29, 2022Publication date: July 20, 2023Inventors: SHOSUKE NAKABAYASHI, JUNJI OHARA, MASATAKE NAGAYA, CHIAKI SASAOKA, SHOICHI ONDA, JUN KOJIMA, DAISUKE KAWAGUCHI, RYUJI SUGIURA, TOSHIKI YUI, KEISUKE HARA
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Publication number: 20230160104Abstract: A method for manufacturing a semiconductor device includes: preparing a processed wafer having a gallium nitride (GaN) wafer and an epitaxial layer on the GaN wafer; forming a device constituent part in a portion of the processes wafer adjacent to a front surface provided by the epitaxial layer; forming a modified layer inside of the processed wafer by applying a laser beam from a back surface side opposite to the front surface side: and dividing the processed wafer at the modified layer. The processed wafer prepared includes a reflective layer for reflecting the laser beam at a position separated from a planned formation position, where the modified layer is to be formed, by a predetermined distance toward the front surface side. The reflective layer contains a layer having a refractive index different from that of a GaN single crystal of an epitaxial layer.Type: ApplicationFiled: November 16, 2022Publication date: May 25, 2023Inventors: Junji OHARA, Takashi ISHIDA, Yoshitaka NAGASATO, Daisuke KAWAGUCHI, Chiaki SASAOKA, Shoichi ONDA, Jun KOJIMA
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Publication number: 20230116302Abstract: A semiconductor chip includes a chip-constituting substrate having one surface, the other surface opposite to the one surface, and two pairs of opposing side surfaces connecting the one surface and the other surface. The one surface and the other surface are along one of a {0001} c-plane, a {1-100} m-plane, and a {11-20} a-plane. One of the two pairs of opposing side surfaces is along another one of the {0001} c-plane, the {1-100} m-plane, and the {11-20} a-plane. The other of the two pairs of opposing side surfaces is along the other of the {0001} c-plane, the {1-100} m-plane, and the {11-20} a-plane. The side surface includes an altered layer containing gallium oxide and gallium metal in a surface layer portion in a depth direction which is a normal direction to the side surface.Type: ApplicationFiled: September 20, 2022Publication date: April 13, 2023Inventors: MASATAKE NAGAYA, Hiroki Watanabe, Junji Ohara, Daisuke Kawaguchi, Keisuke Hara, Chiaki Sasaoka, Jun Kojima, Shoichi Onda
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Publication number: 20220352027Abstract: A semiconductor chip includes a chip constituent substrate having a first surface and a second surface, and including a layer containing gallium nitride. The chip constituent substrate is provided with a semiconductor element, and components constituting the semiconductor element are located more in an area adjacent to the first surface than in an area adjacent to the second surface. The chip constituent substrate is formed with a through hole penetrating the chip constituent substrate from the first surface to the second surface. The through hole defines a first opening adjacent to the first surface and a second opening adjacent to the second surface, and the first opening is larger than the second opening.Type: ApplicationFiled: March 30, 2022Publication date: November 3, 2022Inventors: Shinichi Hoshi, Masatake Nagaya, Chiaki Sasaoka, Daisuke Kawaguchi, Keisuke Hara
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Publication number: 20220093463Abstract: There is provided a laser processing method for cutting a semiconductor object along a virtual plane facing a surface of the semiconductor object in the semiconductor object. The laser processing method includes a first step of forming a plurality of first modified spots along the virtual plane by causing laser light to enter into the semiconductor object from the surface, and a second step of forming a plurality of second modified spots along the virtual plane so as not to overlap the plurality of first modified spots, by causing laser light to enter into the semiconductor object from the surface.Type: ApplicationFiled: December 18, 2019Publication date: March 24, 2022Applicants: National University Corporation Tokai National Higher Education and Research System, HAMAMATSU PHOTONICS K.K.Inventors: Atsushi TANAKA, Chiaki SASAOKA, Hiroshi AMANO, Daisuke KAWAGUCHI, Yotaro WANI, Yasunori IGASAKI
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Publication number: 20220055156Abstract: There is provided a laser processing method for cutting a semiconductor object along a virtual plane facing a surface of the semiconductor object in the semiconductor object. The laser processing method includes a first step of forming a plurality of first modified spots along the virtual plane to obtain first formation density, by causing laser light to enter into the semiconductor object from the surface, and a second step of forming a plurality of second modified spots along the virtual plane so as to obtain second formation density higher than the first formation density, by causing laser light to enter into the semiconductor object from the surface after the first step.Type: ApplicationFiled: December 18, 2019Publication date: February 24, 2022Applicants: National University Corporation Tokai National Higher Education and Research System, HAMAMATSU PHOTONICS K.K.Inventors: Atsushi TANAKA, Chiaki SASAOKA, Hiroshi AMANO, Daisuke KAWAGUCHI, Yotaro WANI, Yasunori IGASAKI, Toshiki YUI
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Publication number: 20210327702Abstract: A method for manufacturing a gallium nitride semiconductor device includes: preparing a gallium nitride wafer; forming an epitaxial growth film on the gallium nitride wafer to provide a processed wafer having chip formation regions; perform a surface side process on a one surface side of the processed wafer; removing the gallium nitride wafer and dividing the processed wafer into a chip formation wafer and a recycle wafer; and forming an other surface side element component on an other surface side of the chip formation wafer.Type: ApplicationFiled: April 13, 2021Publication date: October 21, 2021Inventors: Jun KOJIMA, Chiaki SASAOKA, Shoichi ONDA, Masatake NAGAYA, Kazukuni HARA, Daisuke KAWAGUCHI
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Publication number: 20210327757Abstract: A semiconductor chip includes: an epitaxial film made of gallium nitride; a semiconductor element disposed in the epitaxial film; a chip formation substrate including the epitaxial film and having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface; and a convex and a concavity on the side surface.Type: ApplicationFiled: April 13, 2021Publication date: October 21, 2021Inventors: Masatake Nagaya, Kazukuni Hara, Daisuke Kawaguchi, Toshiki Yui, Chiaki Sasaoka, Jun Kojima, Shoichi Onda
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Publication number: 20210327710Abstract: A gallium nitride semiconductor device includes: a chip formation substrate made of gallium nitride and having one surface and an other surface opposite to the one surface; a one surface side element component disposed on the one surface and providing a component of an one surface side of a semiconductor element; and a metal film constituting a back surface electrode in contact with the other surface. The other surface has an irregularity provided by a plurality of convex portions with a trapezoidal cross section and a plurality of concave portions located between the convex portions; and an upper base surface of the trapezoidal cross section in each of the plurality of convex portions is opposed to the one surface.Type: ApplicationFiled: April 13, 2021Publication date: October 21, 2021Inventors: Chiaki SASAOKA, Jun KOJIMA, Shoichi ONDA, Masatake NAGAYA, Kazukuni HARA, Daisuke KAWAGUCHI
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Publication number: 20210320477Abstract: A method of producing an ultraviolet laser diode with a low oscillation threshold current density includes stacking a first cladding layer, a light-emitting layer, and a second cladding layer on a substrate in this order to form a nitride semiconductor laminate (step S101), etching at least a portion of the nitride semiconductor laminate to form a mesa structure and setting the ratio between the length of the resonator end faces and the length of the side surfaces of the mesa structure in plan view between 1:5 and 1:500 (step S102), disposing first conductive material on a portion of a first area and applying heat treatment of 400° C. or higher to form a first electrode (step S103), and disposing a second conductive material in an area on the second cladding layer, at a distance of 5 um or more from the side surfaces, to form a second electrode (step S104).Type: ApplicationFiled: April 14, 2021Publication date: October 14, 2021Applicants: ASAHI KASEI KABUSHIKI KAISHA, National University Corporation Tokai National Higher Education and Research SystemInventors: Ziyi ZHANG, Maki KUSHIMOTO, Chiaki SASAOKA, Hiroshi AMANO
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Patent number: 8441029Abstract: To suppress adhesion of impurities to a semiconductor light emitting element, there is provided a nitride-based semiconductor light emitting element including: a laminated body having a first cladding layer, an active layer formed over the first cladding layer, and a second cladding layer formed over the active layer; and a dielectric film with a thickness of 3 ?m or more that is formed on the side surface of the laminated body on the side where light is emitted and that covers at least a first side surface of the active layer.Type: GrantFiled: January 21, 2011Date of Patent: May 14, 2013Assignee: Renesas Electronics CorporationInventor: Chiaki Sasaoka
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Publication number: 20110261854Abstract: A semiconductor laser includes a semiconductor substrate and a resonator formed over the semiconductor substrate and containing a nitride semiconductor layer. A strain exerting on a region near the facet of the resonator is smaller than a strain exerting on the region between the regions near the facet.Type: ApplicationFiled: April 20, 2011Publication date: October 27, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Chiaki SASAOKA
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Publication number: 20110180838Abstract: To suppress adhesion of impurities to a semiconductor light emitting element, there is provided a nitride-based semiconductor light emitting element including: a laminated body having a first cladding layer, an active layer formed over the first cladding layer, and a second cladding layer formed over the active layer; and a dielectric film with a thickness of 3 ?m or more that is formed on the side surface of the laminated body on the side where light is emitted and that covers at least a first side surface of the active layer.Type: ApplicationFiled: January 21, 2011Publication date: July 28, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Chiaki SASAOKA
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Patent number: 7760785Abstract: A method of forming a partially etched nitride-based compound semiconductor crystal layer includes the following steps. A non-crystal layer of a nitride-based compound semiconductor is formed. At least a part of the non-crystal layer is then etched to form a partially etched non-crystal layer before the partially etched non-crystal layer is crystallized to form a partially etched nitride-based compound semiconductor crystal layer.Type: GrantFiled: November 19, 2004Date of Patent: July 20, 2010Assignee: NEC CorporationInventor: Chiaki Sasaoka