Patents by Inventor Chieh Wang

Chieh Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240191542
    Abstract: An electronic lock components includes a bracket configured to be mounted on a door panel and an electronic lock body configured to be assembled on or disassembled from the bracket. The bracket includes an elastic piece, and a portion of the elastic piece is inclined downward. The electronic lock body includes: a back cover body, having a through hole therethrough, in which when the back cover body is leaned against the bracket and then moved downward, one end of the portion of the elastic piece is able to be stuck in the through hole; and a main cover body, including a pushing piece having a convex portion facing the through hole, in which when the pushing piece is pushed toward the through hole, the convex portion is able to push the end of the portion of the elastic piece away from the through hole.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 13, 2024
    Inventors: Li-Chun Wang, Meng-Chieh Liu
  • Publication number: 20240193010
    Abstract: A system, an apparatus, and a method for cloud resource allocation are provided. The cloud resource allocation system includes a plurality of worker nodes and a master node. The master node includes: an orchestrator configured to: obtain multiple node resource information respectively reported by a plurality the worker nodes through a resource manager; and parse a job profile of a job request obtained from the waiting queue through the job scheduler and decide to execute a direct resource allocation or a preemptive indirect resource allocation for a job to be handled requested by the job request based on the node resource information and the job profile.
    Type: Application
    Filed: March 14, 2023
    Publication date: June 13, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chun-Chieh Huang, Tzu-Chia Wang, Chien-Hung Lee, Yi-Lin Wu, Guo-Hong Lai, Lin-Kang Wu
  • Publication number: 20240192895
    Abstract: A host system operates to manage a storage device. The host system initiates an abort of a command when the command has been fetched from a submission queue (SQ) of the host system and the SQ entry has been fetched from the SQ and the host system has not received a corresponding command completion response from the storage device. The host system sends an abort request to the storage device, and issues a cleanup request to direct a host controller to reclaim host hardware resources allocated to the command. The host system adds a completion queue (CQ) entry to a CQ and sets an overall command status (OCS) value of the CQ entry to indicate completion of the abort request.
    Type: Application
    Filed: February 22, 2024
    Publication date: June 13, 2024
    Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Chin Chin Cheng, Szu-Chi Liu
  • Patent number: 12009394
    Abstract: A device includes a device layer comprising a first transistor and a second transistor; a first interconnect structure on a front-side of the device layer; and a second interconnect structure on a backside of the device layer. The second interconnect structure comprising a first dielectric layer on the backside of the device layer, wherein a semiconductor material is disposed between the first dielectric layer and a first source/drain region of the first transistor; a contact extending through the first dielectric layer to a second source/drain region of the second transistor; and a first conductive line electrically connected to the second source/drain region of the second transistor through the contact.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Li-Zhen Yu, Huan-Chieh Su, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
  • Publication number: 20240181127
    Abstract: A bone substitute composition includes a bone substitute matrix and a conditioning solution. The bone substitute matrix includes 85% to 98% by weight of alkaline calcium phosphate powder, 1% to 10% by weight of a polymer, and 1% to 5% by weight of a crosslinker. The conditioning solution includes 90% to 97% by weight of water, 1% to 5% by weight of a phosphate, and 1% to 5% by weight of a water-soluble acidic compound.
    Type: Application
    Filed: March 20, 2023
    Publication date: June 6, 2024
    Inventors: Kuan-Yu CHIU, Yen-Hao CHANG, Chun-Chieh TSENG, Tung-Lin TSAI, Chun-Ming CHEN, Yue-Jun WANG, Tzyy-Ker SUE
  • Publication number: 20240186179
    Abstract: Semiconductor devices including air spacers formed in a backside interconnect structure and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure; and a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including a first dielectric layer on the backside of the first transistor structure; a first via extending through the first dielectric layer, the first via being electrically coupled to a first source/drain region of the first transistor structure; a first conductive line electrically coupled to the first via; and an air spacer adjacent the first conductive line, the first conductive line defining a first side boundary of the air spacer.
    Type: Application
    Filed: January 23, 2024
    Publication date: June 6, 2024
    Inventors: Li-Zhen Yu, Huan-Chieh Su, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
  • Publication number: 20240183196
    Abstract: A transmission mechanism for an electronic door lock is provided. The transmission mechanism includes a gear box, a motor module, a transmission gear set, a transmission rod, a clutch transmission module and a motion detection circuit board. A returning detection module is installed on the motion detection circuit board. The returning detection module is used to detect the actuation state of the clutch transmission module.
    Type: Application
    Filed: February 13, 2023
    Publication date: June 6, 2024
    Inventors: Li-Chun Wang, Meng-Chieh Liu
  • Patent number: 12001628
    Abstract: The disclosure provides an electronic device adapted to communicate with a stylus. The electronic device includes a display panel, a touch module, and a processor. The display panel has a display area, the touch module has a touchable area, and the processor is electrically connected to the display panel and the touch module. The processor is configured to: define at least one effective input area in response to an operation of the stylus in the touchable area, and when the touch module detects that the stylus is approaching the effective input area, switch the effective input area to a stylus mode, and display a range marking pattern in the effective input area.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: June 4, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chao-Chieh Cheng, Yi-Ou Wang, Ya-Ting Chen, Chun-Tsai Yeh
  • Patent number: 12003898
    Abstract: A projector and a projection method are provided. The projector includes a control device, a projection optical engine, a distance sensing device, and an image capturing device. The projection optical engine projects a first projection image to a projection surface according to first image data. The distance sensing device senses multiple distance parameters of a projection area. The image capturing device captures the first projection image to obtain a first captured image. The control device performs a keystone correction operation and a leveling correction operation on the first image data. The projection optical engine projects a second projection image to the projection surface according to the corrected first image data. The control device obtains a second captured image including the second projection image through the image capturing device, and analyzes the second captured image to project current projection image size information in the second projection image.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: June 4, 2024
    Assignee: Coretronic Corporation
    Inventors: Chun-Chieh Wang, Fan-Chieh Chang
  • Patent number: 12004431
    Abstract: A semiconductor device includes a bottom electrode; a magnetic tunneling junction (MTJ) element over the bottom electrode; a top electrode over the MTJ element; and a sidewall spacer abutting the MTJ element, wherein at least one of the bottom electrode, the top electrode, and the sidewall spacer includes a magnetic material.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Chieh Hsiao, Po-Sheng Lu, Wei-Chih Wen, Liang-Wei Wang, Yu-Jen Wang, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20240176093
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
  • Patent number: 11996481
    Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Chih-Hao Wang, Kuo-Cheng Chiang, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu, Yu-Ming Lin, Chung-Wei Hsu
  • Patent number: 11997116
    Abstract: A detection device and a detection method for a malicious HTTP request are provided. The detection method includes: receiving a HTTP request and capturing a parameter from the HTTP request; filtering the HTTP request in response to the parameter not matching a whitelist; encoding each character of the HTTP request to generate an encoded string in response to the HTTP request not being filtered; generating an estimated HTTP request according to the encoded string by using an autoencoder; and determining that the HTTP request is a malicious HTTP request in response to a similarity between the HTTP request and the estimated HTTP request being less than a similarity threshold, and outputting a determined result.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: May 28, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Pei-Hsuan Lu, Pang-Chieh Wang
  • Patent number: 11996461
    Abstract: Semiconductor structures and methods of forming the same are provided. A semiconductor structure according to one embodiment includes first nanostructures, a first gate structure wrapping around each of the first nanostructures and disposed over an isolation structure, and a backside gate contact disposed below the first nanostructures and adjacent to the isolation structure. A bottom surface of the first gate structure is in direct contact with the backside gate contact.
    Type: Grant
    Filed: May 22, 2023
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Lo-Heng Chang, Li-Zhen Yu, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
  • Patent number: 11996772
    Abstract: The present invention provides a voltage control method for controlling a power supply. The voltage control method comprises the following steps: obtaining a present output voltage value associated with a present gain value; obtaining a predetermined output voltage value associated with a predetermined duty ratio; calculating a target gain value, corresponding to the predetermined duty ratio, according to a gain value formula; performing a weight calculation on the present gain value and the target gain value for generating a buffer gain value; and setting an output voltage command according to the buffer gain value. Wherein the buffer gain value is between the present gain value and the target gain value.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: May 28, 2024
    Assignee: Chroma ATE Inc.
    Inventors: Szu-Chieh Su, Wei-Chin Tseng, Chih-Hsien Wang, His-Ping Tsai, Wen-Chih Chen, Guei-Cheng Hu
  • Publication number: 20240164795
    Abstract: A surgical instrument includes a rod and a push portion. The push portion includes a first end connected to an end of the rod and a second end having a blade portion. The push portion includes a plurality of grooves. The plurality of grooves is recessed in a surface of the push portion and is spaced from each other. Each two adjacent grooves has a rib formed therebetween. A top face of a cross section of each rib is the surface of the push portion. Each rib has a guiding face on the cross section of the push portion. The guiding face is connected to the surface of the push portion. The guiding face faces a rotating direction of the rod. An angle between the guiding face and the surface of the push portion in the cross section is greater than 90°.
    Type: Application
    Filed: November 22, 2022
    Publication date: May 23, 2024
    Inventors: Tung-Lin TSAI, Chun-Chieh TSENG, Chun-Ming CHEN, Yue-Jun WANG, Pei-Hua WANG
  • Publication number: 20240169596
    Abstract: An encoding method, a decoding method, and a device for point cloud compression are provided. The encoding method includes the following. Point cloud data corresponding to a first frame is obtained, and is distinguished into a global point cloud set and at least one object point cloud set according to a reference frame. The object point cloud set corresponds to at least one reference object point cloud set. A global dynamic model corresponding to the global point cloud set is calculated and an object dynamic model corresponding to the object point cloud set is calculated. A bitstream is generated. The bitstream includes the global point cloud set, the global dynamic model corresponding to the global point cloud set, a serial number of each object point in the reference object point cloud set, and the object dynamic model corresponding to the object point cloud set.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Sheng-Po Wang, Jie-Ru Lin, Ching-Chieh Lin, Chun-Lung Lin
  • Publication number: 20240170296
    Abstract: A method for forming a semiconductor structure includes forming strip patterns over a semiconductor substrate, forming a hard mask layer over the strip patterns, and forming a patterned photoresist layer over the hard mask layer. The patterned photoresist layer has a plurality of first openings. The method also includes etching the hard mask layer using the patterned photoresist layer. Remaining portions of the hard mask layer form a plurality of pillar patterns that are separated from one another. The method also includes depositing a dielectric layer along the plurality of pillar patterns, etching the dielectric layer to form a plurality of second openings, removing the plurality of pillar patterns to form a plurality of third openings in the dielectric layer, and etching the strip patterns using the dielectric layer as a mask.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 23, 2024
    Inventors: Hung-Jung YAN, Chun-Chieh WANG, Tzu-Ming OU YANG
  • Publication number: 20240172347
    Abstract: A lighting device includes a driver, a first light string, a second light string, a constant current controller and a pulse width modulation controller. The driver is configured to provide a DC driving current to a shunt node. The first light string is electrically coupled between the shunt node and a ground terminal, and the first light string is driven by a first pulsating direct current. The second light string and the constant current controller are electrically coupled in series between the shunt node and the ground terminal. The pulse width modulation controller is configured to provide a pulse signal to the constant current controller, and the constant current controller controls a pulse frequency of a second pulsating direct current supplied for the second light string according to the pulse signal.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 23, 2024
    Inventors: Chih-Hsien Wang, Kuan-Hsien Tu, Kai-Wei Chen, Ming-Chieh Cheng
  • Patent number: 11990550
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure formed over a fin structure, and a source/drain (S/D) epitaxial layer formed in the fin structure and adjacent to the gate structure. The semiconductor structure also includes a S/D silicide layer formed on the S/D epitaxial layer, and the S/D silicide layer has a first width, the S/D epitaxial layer has a second width, and the first width is smaller than the second width. The semiconductor structure includes a dielectric spacer between the gate structure and the S/D silicide layer, and a top surface of the dielectric spacer is lower than a top surface of the gate structure.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Wang, Yu-Ting Lin, Yueh-Ching Pai, Shih-Chieh Chang, Huai-Tei Yang