Patents by Inventor Chie Yano

Chie Yano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5388160
    Abstract: In a noise suppressor, a noise signal detected by a first detector is inputted to an adaptive filter and a FIR filter. An output signal of the adaptive filter is reproduced by a speaker. The signal reproduced by the speaker and a noise signal from a noise source are detected by a second detector. The signal detected by the second detector is band-limited by a filter circuit and sent to a LMS computing circuit. The LMS computing circuit updates a coefficient of the adaptive filter so as to minimize an output signal of the filter circuit in response to an output signal of the FIR filter and an output signal of the filter circuit.
    Type: Grant
    Filed: June 8, 1992
    Date of Patent: February 7, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Hashimoto, Kenichi Terai, Yasutoshi Nakama, Hironari Ogata, Chie Yano