Patents by Inventor Chieh-En Lee

Chieh-En Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device with reduced area
    Patent number: 11984165
    Abstract: A memory device includes a plurality of word lines (WLs). The memory device includes a plurality of drivers that are each configured to control a corresponding one of the plurality of WLs and each comprise a first transistor having a first conductive type and a second transistor having a second conductive type. The first transistor of a first one of the drivers is formed in a first well of a substrate, and the second transistor of the first driver is formed in a second well of the substrate. The first well is spaced apart from the second well.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ying Lee, Chia-En Huang, Chieh Lee
  • Method and image processing device for mura detection on display
    Patent number: 11676265
    Abstract: A method and an image processing device for mura detection on a display are proposed. The method includes the following steps. An original image of the display is received and segmented into region of interest (ROI) patches. A predetermined range of spatial frequency components are filtered out from the ROI patches to generate filtered ROI patches. A mura defect is identified from the display according to the filtered ROI patches and predetermined mura patterns.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: June 13, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih-Yu Chu, Po-Yuan Hsieh, Chieh-En Lee, Chung-Hao Tien, Shih-Hsuan Chen
  • METHOD AND IMAGE PROCESSING DEVICE FOR MURA DETECTION ON DISPLAY
    Publication number: 20220036527
    Abstract: A method and an image processing device for mura detection on a display are proposed. The method includes the following steps. An original image of the display is received and segmented into region of interest (ROI) patches. A predetermined range of spatial frequency components are filtered out from the ROI patches to generate filtered ROI patches. A mura defect is identified from the display according to the filtered ROI patches and predetermined mura patterns.
    Type: Application
    Filed: July 31, 2020
    Publication date: February 3, 2022
    Applicant: Novatek Microelectronics Corp.
    Inventors: Chih-Yu Chu, Po-Yuan Hsieh, Chieh-En Lee, Chung-Hao Tien, Shih-Hsuan Chen