Patents by Inventor Chieh Lee

Chieh Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230260413
    Abstract: A surgical procedure labeling and teaching system and a method thereof are disclosed. When one of names of to-be-labeled surgical images on a surgical image selection area of a user interface is selected, the to-be-labeled surgical image corresponding to the selected name is displayed on a surgical image labeling area of the user interface; after one of surgery label blocks on a surgery label selection area of the user interface is selected, a user can circle a surgery labeling area to establish a surgery feature label on the surgical image labeling area. A teaching interface can map the labeled surgical image to the to-be-labeled surgical image, so as to provide a surgical procedure teaching corresponding to the to-be-labeled surgical image. The technical effect of providing surgical procedure teaching by using the labeling-reference surgical image to assist in labeling and selecting of the to-be-labeled surgical image is achieved.
    Type: Application
    Filed: February 16, 2022
    Publication date: August 17, 2023
    Inventors: Yu-Chieh LEE, Yi-Ta SHEN, Hsin-Man CHIANG
  • Patent number: 11721411
    Abstract: A method for testing a memory chip includes: in response to read command for the memory chip, controlling clock signal to be kept in first state within first preset time period and at the same time controlling complementary clock signal to be kept in second state within first preset time period; in response to clock signal kept in the first state and complementary clock signal kept in the second state, keeping data strobe signal in the first state within second preset time period and at the same time keeping complementary data strobe signal in the second state within the second preset time period; and when the data strobe signal and the complementary data strobe signal are kept in first and second states respectively, controlling first and second driving modules connected respectively to data strobe terminal and complementary data strobe terminal to operate and measure first and second resistance values respectively.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: August 8, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Jinghong Xu, Yuan-Chieh Lee
  • Publication number: 20230209066
    Abstract: Techniques are described for efficiently encoding video data by skipping evaluation of certain encoding modes based on various evaluation criteria. In some solutions, intra-block evaluation is performed in a specific order during encoding, and depending on encoding cost calculations of potential intra-block encoding modes, evaluation of some of the potential modes can be skipped. In some solutions, some encoding modes can be skipped depending on whether blocks are simple (e.g., simple vertical, simple horizontal, or both) or non-simple. In some solutions, various criteria are applied to determine whether chroma-from-luma mode evaluation can be skipped. The various solutions can be used independently and/or in combination.
    Type: Application
    Filed: February 28, 2023
    Publication date: June 29, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Jiahao Li, Bin Li, Yan Lu, Mei-Hsuan Lu, Andrey Mikhaylovic Mezentsev, Ming-Chieh Lee
  • Patent number: 11689558
    Abstract: An attack path detection method, attack path detection system and non-transitory computer-readable medium are provided in this disclosure. The attack path detection method includes the following operations: establishing a connecting relationship among a plurality of hosts according to a host log set to generate a host association graph; labeling at least one host with an abnormal condition on the host association graph; calculating a risk value corresponding to each of the plurality of hosts; in a host without the abnormal condition, determining whether the risk value corresponding to the host without the abnormal condition is greater than a first threshold, and utilizing a host with the risk value greater than the first threshold as a high-risk host; and searching at least one host attach path from the high-risk host and the at least one host with the abnormal condition according to the connecting relationship of the host association graph.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: June 27, 2023
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Meng-Hsuan Chung, Chieh Lee, Hsiao-Hsien Chang
  • Patent number: 11677248
    Abstract: An electronic device selectively coupled to a first charger and/or a second charger includes a power supply interface, a first comparator, a second comparator, a controller, a first switch circuit, and a second switch circuit. The power supply interface receives a first input voltage and a second input voltage. The first comparator compares the first input voltage with a first reference voltage, so as to generate a first comparison voltage. The second comparator compares the second input voltage with a second reference voltage, so as to generate a second comparison voltage. The controller generates a first control voltage and a second control voltage according to the first comparison voltage and the second comparison voltage. The first switch circuit is selectively enabled or disabled according to the first control voltage. The second switch circuit is selectively enabled or disabled according to the second control voltage.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: June 13, 2023
    Assignee: QUANTA COMPUTER INC.
    Inventors: Hsin-Chih Kuo, Ming-Chieh Lee
  • Patent number: 11676641
    Abstract: A memory device includes a first layer, wherein the first layer includes a first memory array, a first row decoder circuit, and a first column sensing circuit. The memory device includes a second layer disposed with respect to the first layer in a vertical direction. The second layer includes a first peripheral circuit operatively coupled to the first memory array, the first row decoder circuit, and the first column sensing circuit. The memory device includes a plurality of interconnect structures extending along the vertical direction. At least a first one of the plurality of interconnect structures operatively couples the second layer to the first layer.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: June 13, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chieh Lee, Yi-Ching Liu, Chia-En Huang, Chang Jen-Yuan, Yih Wang
  • Publication number: 20230146325
    Abstract: A catalyst for methanation reaction and a method for preparing methane are provided. The catalyst for methanation reaction includes a core, a shell encapsulating the core, and an active metal. The core includes cerium dioxide (CeO2), the shell includes zirconium dioxide (ZrO2), and the active metal is in particle form and is disposed on an outer surface of the shell layer.
    Type: Application
    Filed: September 16, 2022
    Publication date: May 11, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Chih CHEN, Man-Yin LO, Hsi-Yen HSU, Ying-Chieh LEE, Yuan-Peng DU
  • Patent number: 11647273
    Abstract: A portable electronic device and a customized image-capturing module thereof are provided. The customized image-capturing module includes a carrier substrate, an image-capturing chip, and a lens assembly. The carrier substrate includes a carrier body, a plurality of first conductive pads, and a plurality of second conductive pads. The image-capturing chip is disposed inside a concave space of the carrier body, and the image-capturing chip includes a plurality of conductive chip pads. The second conductive pads are exposed from a bottom side of the carrier body, the conductive chip pads are electrically connected to the second conductive pads through the first conductive pads, respectively, so that when the customized image-capturing module is partially disposed inside a receiving space and positioned between two electronic elements, the second conductive pads can be electrically connected to conductive substrate pads of a circuit substrate through soldering materials, respectively.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 9, 2023
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: Tseng-Chieh Lee, Kung-An Lin, Chih-Yuan Chuang, Chien-Che Ting
  • Publication number: 20230127753
    Abstract: A lock having a rotatable auxiliary positioning structure is adapted to connect with a latch element which includes a drive orifice, and the lock contains: a first locking assembly and a second locking assembly. The first locking assembly includes a transmission unit and a guide seat, the guide seat has at least one guiding extension. The second locking assembly includes a driving element, and a connecting position is defined between the first locking assembly and the second locking assembly in a rotatable direction. At least one of the transmission unit and the driving element is rotatably received in and drives the drive orifice of the latch element, the at least one guiding extension is configured to be connected with the latch element and to guide the first locking assembly to be positioned on the connecting position along the rotatable direction opposite to the latch element.
    Type: Application
    Filed: January 6, 2022
    Publication date: April 27, 2023
    Inventor: WEN-CHIEH LEE
  • Patent number: 11636795
    Abstract: A method of providing display signal, performed by a first processing device, and the method includes: triggered by a first detection signal to read first identification data of a display, obtaining second identification data according to a reading condition, outputting a second detection signal to a second processing device to obtain an identification data request signal from the second processing device, and outputting the second identification data to the second processing device according to the identification data request signal to instruct the second processing device to output a display signal to the display according to a resolution indicated by the second identification data. The present disclosure further provides a resolution setting device and a display system.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: April 25, 2023
    Assignee: WISTRON CORP.
    Inventors: Po-Yen Huang, Kuang Wei Wang, Tzu-Chieh Lee, Yen-Hsiang Wang, Ching-Ting Huang
  • Patent number: 11637361
    Abstract: An antenna structure includes a metal frame, a feeding portion, and a first ground portion. The metal frame is provided with a slot, a first gap, a second gap, and a third gap. The first gap, the second gap, and the third gap are coupled to the slot, and the slot, the first gap, the second gap, and the third gap divide the metal frame into a radiating portion and a first coupling portion. A portion of the metal frame between the first gap and the third gap form the radiating portion, and a portion of the metal frame between the second gap and the third gap form the first coupling portion. The feeding portion is electrically coupled to the radiating portion to feed an electric signal to the radiating portion. The first ground portion is electrically coupled to the radiating portion to provide ground to the radiating portion.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: April 25, 2023
    Assignee: Chiun Mai Communication Systems, Inc.
    Inventors: Yung-Chin Chen, Kun-Lin Sung, Yi-Chieh Lee
  • Publication number: 20230108722
    Abstract: Innovations in allocation of bit rate between video streams using machine learning are described. For example, a controller of a video encoder system receives first feedback values that indicate results of encoding part of a first video sequence (e.g., screen content). The controller also receives second feedback values that indicate results of encoding part of a second video sequence (e.g., camera video content). A machine learning model accepts, as inputs, the first feedback values and second feedback values. The machine learning model produces, as output, a reallocation parameter. The controller determines a first target bit rate and a second target bit rate using the reallocation parameter. A first video encoder encodes one or more pictures of the first video sequence at the first target bit rate, and a second video encoder encodes one or more pictures of the second video sequence at the second target bit rate.
    Type: Application
    Filed: October 1, 2021
    Publication date: April 6, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Satya Sasikanth BENDAPUDI, Ming-Chieh LEE, Yan LU, Bin LI, Jiahao LI
  • Publication number: 20230108645
    Abstract: Innovations in adaptive encoding of screen content based on motion type are described. For example, a video encoder system receives a current picture of a video sequence. The video encoder system determines a current motion type for the video sequence and, based at least in part on the current motion type, sets one or more encoding parameters. Then, the video encoder system encodes the current picture according to the encoding parameter(s). The innovations can be used in real-time encoding scenarios when encoding screen content for a screen sharing application, desktop conferencing application, or other application. In some cases, the innovations allow a video encoder system to adapt compression to different characteristics of screen content at different times within the same video sequence.
    Type: Application
    Filed: October 1, 2021
    Publication date: April 6, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Satya Sasikanth BENDAPUDI, Ming-Chieh LEE, Yan LU, Bin LI, Jizhe JIN, Jiahao LI, Shao-Ting WANG
  • Patent number: 11622118
    Abstract: Techniques are described for efficiently encoding video data by skipping evaluation of certain encoding modes based on various evaluation criteria. In some solutions, intra-block evaluation is performed in a specific order during encoding, and depending on encoding cost calculations of potential intra-block encoding modes, evaluation of some of the potential modes can be skipped. In some solutions, some encoding modes can be skipped depending on whether blocks are simple (e.g., simple vertical, simple horizontal, or both) or non-simple. In some solutions, various criteria are applied to determine whether chroma-from-luma mode evaluation can be skipped. The various solutions can be used independently and/or in combination.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 4, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Jiahao Li, Bin Li, Yan Lu, Mei-Hsuan Lu, Andrey Mikhaylovic Mezentsev, Ming-Chieh Lee
  • Publication number: 20230102731
    Abstract: The present disclosure relates to an step artificial leather having visual penetration and a manufacturing method thereof. The artificial leather includes a thermoplastic substrate, a thermoplastic adhering layer, and a thermoplastic surface layer. The thermoplastic substrate has fiber net shape, and has visual penetration. The thermoplastic adhering layer is disposed on the thermoplastic substrate. The thermoplastic surface layer is disposed on the thermoplastic adhering layer. The thermoplastic surface layer and the thermoplastic adhering layer are transparent. Therefore, the artificial leather of the present disclosure has visual penetration effect. The product made from the artificial leather of the present disclosure has attractive appearance and diversity.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 30, 2023
    Inventors: CHIH-YI LIN, KUO-KUANG CHENG, CHIEN-CHIA HUANG, TSUNG-YU TSAI, CHIEH LEE, WEI-LING CHEN
  • Publication number: 20230086944
    Abstract: A format for use in encoding moving image data, comprising: a sequence of frames including plurality of the frames in which at least a region is encoded using motion estimation; a respective set of motion vector values representing motion vectors of the motion estimation for each respective one of these frames or each respective one of one or more regions within each of such frames; and at least one respective indicator associated with each of the respective frames or regions, indicating whether the respective motion vector values of the respective frame or region are encoded at a first resolution or a second resolution.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 23, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: You Zhou, Sergey Silkin, Sergey Sablin, Chih-Lung Lin, Ming-Chieh Lee, Gary J. Sullivan
  • Publication number: 20230067423
    Abstract: A memory device includes a first layer, wherein the first layer includes a first memory array, a first row decoder circuit, and a first column sensing circuit. The memory device includes a second layer disposed with respect to the first layer in a vertical direction. The second layer includes a first peripheral circuit operatively coupled to the first memory array, the first row decoder circuit, and the first column sensing circuit. The memory device includes a plurality of interconnect structures extending along the vertical direction. At least a first one of the plurality of interconnect structures operatively couples the second layer to the first layer.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chieh Lee, Yi-Ching Liu, Chia-En Huang, Chang Jen-Yuan, Yih Wang
  • Publication number: 20230064162
    Abstract: A semiconductor device and method of manufacturing a semiconductor device is disclosed herein including creating a photoresist mixture that includes a surfactant, and a base solvent; one or more boiling point modifying solvents having a boiling point higher in temperature than the base solvent; and one or more hydrophilicity modifying solvents that are more hydrophilic than the base solvent; depositing the photoresist mixture onto a substrate comprising a plurality of UBMLs using a wet film process; performing a pre-bake process to cure the photoresist; and patterning the photoresist.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Hsing-Chieh Lee, Hung-Jui Kuo, Ming-Tan Lee, Ting Yi Lin
  • Patent number: 11593056
    Abstract: An interactive exercise apparatus for allowing a user to invite a friend to join an exercise class includes a mirror display device, a communication module and a control unit. The mirror display device has a mirror configured to reflect an image of the user and a display device configured to display video content which includes an instructor image demonstrating an exercise in the exercise class. The communication module is configured to interconnect with another interactive exercise apparatus of the friend via a network. The control unit is configured to control display content and is operable to control the mirror display device to display the instructor image and a real-time image of the friend to the user. Specifically, the instructor image, the image of the friend and the image of the user reflected by the mirror are shown simultaneously on the mirror display device during the exercise class.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: February 28, 2023
    Assignee: Johnson Health Tech Co., Ltd.
    Inventors: Hsin-Huang Chiang, Yu-Chieh Lee, Ning Chuang, Wei-Ting Weng, Cheng-Ho Yeh
  • Patent number: 11595667
    Abstract: When encoding/decoding a current block of a current picture using intra block copy (“BC”) prediction, the location of a reference block is constrained so that it can be entirely within an inner search area of the current picture or entirely within an outer search area of the current picture, but cannot overlap both the inner search area and the outer search area. In some hardware-based implementations, on-chip memory buffers sample values of the inner search area, and off-chip memory buffers sample values of the outer search area. By enforcing this constraint on the location of the reference block, an encoder/decoder can avoid memory access operations that are split between on-chip memory and off-chip memory when retrieving the sample values of the reference block. At the same time, a reference block close to the current block may be used for intra BC prediction, helping compression efficiency.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: February 28, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: You Zhou, Chih-Lung Lin, Ming-Chieh Lee