Abstract: An electrostatic discharge protection device that includes a plurality of voltage drop elements, an impedance element, a driving circuit, and a clamping circuit is provided. The voltage drop elements are electrically connected in series between a first line and a node, and the voltage drop elements are configured to define an activating voltage. If a signal from the first line is greater than the activating voltage, the voltage drop elements conduct the first line to the node in response to the signal from the first line. The impedance element is electrically connected between the node and a second line. The driving circuit amplifies a control signal from the node and accordingly generates a driving signal. The clamping circuit determines whether to generate a discharging path between the first line and the second line according to the driving signal.

Abstract: An input circuit suitable for an integrated circuit (IC) and a protection circuit in the input circuit are provided. The protection circuit includes a transistor, a voltage selector, an inverter, a resistor and a switch circuit. The transistor is coupled to an input end of the protection circuit. The voltage selector is coupled to the transistor and the input end of the protection circuit, and outputs a lower one of a voltage at the input end of the protection circuit and a ground voltage to the transistor. The inverter is coupled to the transistor. The resistor is coupled between a power supply voltage and the inverter. The switch circuit is coupled to the inverter, a preset voltage and an output end of the protection circuit and is controlled by the inverter to connect the preset voltage to the output end or to switch the output end to a floating state.

Abstract: An input circuit suitable for an integrated circuit (IC) and a protection circuit in the input circuit are provided. The protection circuit includes a transistor, a voltage selector, an inverter, a resistor and a switch circuit. The transistor is coupled to an input end of the protection circuit. The voltage selector is coupled to the transistor and the input end of the protection circuit, and outputs a lower one of a voltage at the input end of the protection circuit and a ground voltage to the transistor. The inverter is coupled to the transistor. The resistor is coupled between a power supply voltage and the inverter. The switch circuit is coupled to the inverter, a preset voltage and an output end of the protection circuit and is controlled by the inverter to connect the preset voltage to the output end or to switch the output end to a floating state.

Abstract: An ESD structure, including a first conductive type substrate, a second conductive type well region in the substrate, first/second doped regions (the first type), fourth to sixth doped regions (second conductive type), and first/second gates, is provided. The first/second doped regions are respectively disposed in the well region and the substrate. The first/second gates are on the substrate surface with no well region below. A third doped region is between the first and second gates in the substrate. The fourth doped region is in the substrate and on one side of the first/second gates. The fifth doped region is in the substrate, extends into the well region, and on another side of the first/second gates. The first doped region is located between the fifth and sixth doped region. The first/sixth doped regions and the first gate are connected. The fourth/second doped region and the second gate are connected.

Abstract: An electrostatic discharge (ESD) protection device including a modified lateral silicon-controlled rectifier (MLSCR) and a voltage control circuit is provided. The MLSCR has a first terminal, a second terminal and a control terminal connected to a first P+-type doped region, where the first terminal and the second terminal are electrically connected to a first line and a second line, respectively. The voltage control circuit is electrically connected to the first line, the second line and the control terminal. When an electrostatic pulse is appeared on the first line, the voltage control circuit provides a current path from the first line to the control terminal. When an input signal is supplied to the first line, the voltage control circuit receives a power voltage, and stops providing the current path according to the power voltage.

Abstract: An electrostatic discharge protection device including a protection circuit, a first resister and a low-pass filter is provided. The protection circuit includes a first element and a second element. The first element and the second element are electrically connected in series between a power line and a ground line, and a connection node is disposed between the first element and the second element. The low-pass filter, the protection circuit and the first resister are electrically connected in series between an input pad and an internal circuit.

Abstract: An ESD protection device including second P-type wells, first P+-type doped regions, first N+-type doped regions and a P-type substrate having a first P-type well, an N-type well and an N-type deep well is provided. The second P-type wells are disposed in the N-type deep well. The first P+-type doped regions and the first N+-type doped regions are respectively disposed in the first P-type well, the N-type well and the second P-type wells in alternation. The first P+-type doped region in the N-type well and the N-type deep well are electrically connected to the first connection terminal. The doped regions in the first P-type well and the P-type substrate are electrically connected to the second connection terminal. The second P-type wells and the first N+-type doped regions therein form a diode string connected in series between the first N+-type doped region of the N-type well and the second connection terminal.

Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second pads to protect an internal circuit therebetween. Under a normal operating condition, a voltage on the first pad is higher than that on the second pad. The ESD protection circuit includes a substrate of a first conductivity type; first well of a second conductivity type in the substrate, wherein the first well is coupled to the first pad; a snapback device housed in the first well; and a diode string in the substrate, connected in series with the snapback device and separated from the first well, wherein the serially connected diode string and snapback device is connected between the first pad and the second pad. With the isolation from the first well, the holding voltage of the ESD protection circuit can be tuned by adjusting the number of diodes in the diode string without using a guard ring.

Abstract: A semiconductor device, an electrostatic discharge protection device and manufacturing method thereof are provided. The electrostatic discharge protection device includes a gate, a gate dielectric layer, an N-type source region, an N-type drain region, an N-type doped region and a P-type doped region. The gate dielectric layer is disposed on a substrate. The gate is disposed on the gate dielectric layer. The N-type source region and the N-type drain region are disposed in the substrate at two sides of the gate, respectively. The N-type doped region is disposed in the N-type drain region and connects to the top of the N-type drain region. The P-type doped region is disposed under the N-type drain region and connects to the bottom of the N-type drain region.

Abstract: An electrostatic discharge protection device is provided. The electrostatic discharge protection device includes a clamp unit and a control circuit. The clamp unit provides a discharging path from a first power line to a first ground line. The control circuit receives a first power voltage from the first power line and a second power voltage from a second power line. Wherein, when the first power voltage and the second power voltage are applied, the control circuit generates an isolation signal to disconnect the discharging path. When the first power voltage and the second power voltage are not applied, the control circuit generates a trigger signal according to an electrostatic signal from the first power line to turn on the discharging path.

Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second pads to protect an internal circuit therebetween. Under a normal operating condition, a voltage on the first pad is higher than that on the second pad. The ESD protection circuit includes a substrate of a first conductivity type; first well of a second conductivity type in the substrate, wherein the first well is coupled to the first pad; a snapback device housed in the first well; and a diode string in the substrate, connected in series with the snapback device and separated from the first well, wherein the serially connected diode string and snapback device is connected between the first pad and the second pad. With the isolation from the first well, the holding voltage of the ESD protection circuit can be tuned by adjusting the number of diodes in the diode string without using a guard ring.

Abstract: An electrostatic discharge (ESD) protection circuit connecting to an input pad is configured to dissipate an ESD current. The circuit has a substrate of a first conductivity type, a first well of a second conductivity type in the substrate, and a second well of the first conductivity type in the first well. The circuit further has a diode device having a first end of the first conductivity type electrically coupled to the input pad and a second end of the second conductivity type in the second well. Moreover, the protection circuit has a first doped region of the second conductivity type in the first well electrically connecting to the input pad, and a second doped region of the first conductivity type in the substrate electrically coupled to the ground. The circuit also has a channel formed between the input pad and the second doped region to provide an ESD current discharge.

Abstract: An electrostatic discharge (ESD) protection device including a modified lateral silicon-controlled rectifier (MLSCR) and a voltage control circuit is provided. The MLSCR has a first terminal, a second terminal and a control terminal connected to a first P+-type doped region, where the first terminal and the second terminal are electrically connected to a first line and a second line, respectively. The voltage control circuit is electrically connected to the first line, the second line and the control terminal. When an electrostatic pulse is appeared on the first line, the voltage control circuit provides a current path from the first line to the control terminal. When an input signal is supplied to the first line, the voltage control circuit receives a power voltage, and stops providing the current path according to the power voltage.

Abstract: An electrostatic discharge protection device is provided. The electrostatic discharge protection device includes a clamp unit and a control circuit. The clamp unit provides a discharging path from a first power line to a first ground line. The control circuit receives a first power voltage from the first power line and a second power voltage from a second power line. Wherein, when the first power voltage and the second power voltage are applied, the control circuit generates an isolation signal to disconnect the discharging path. When the first power voltage and the second power voltage are not applied, the control circuit generates a trigger signal according to an electrostatic signal from the first power line to turn on the discharging path.

Abstract: An ESD protection device including second P-type wells, first P+-type doped regions, first N+-type doped regions and a P-type substrate having a first P-type well, an N-type well and an N-type deep well is provided. The second P-type wells are disposed in the N-type deep well. The first P+-type doped regions and the first N+-type doped regions are respectively disposed in the first P-type well, the N-type well and the second P-type wells in alternation. The first P+-type doped region in the N-type well and the N-type deep well are electrically connected to the first connection terminal. The doped regions in the first P-type well and the P-type substrate are electrically connected to the second connection terminal. The second P-type wells and the first N+-type doped regions therein form a diode string connected in series between the first N+-type doped region of the N-type well and the second connection terminal.

Abstract: An electrostatic discharge protection device electrically connected between a pad and an internal circuit is provided and includes a capacitor, a first resistor, a voltage-drop element and an NMOS transistor. A first end of the capacitor is electrically connected to the pad. A first end of the first resistor is electrically connected to a second end of the capacitor, and a second end of the first resistor is electrically connected to ground. The NMOS transistor and the voltage-drop element are connected in series between the pad and the ground, a gate of the NMOS transistor is electrically connected to the second end of the capacitor, and a bulk of the NMOS transistor is electrically connected to the ground.

Abstract: A semiconductor device, an electrostatic discharge protection device and manufacturing method thereof are provided. The electrostatic discharge protection device includes a gate, a gate dielectric layer, an N-type source region, an N-type drain region, an N-type doped region and a P-type doped region. The gate dielectric layer is disposed on a substrate. The gate is disposed on the gate dielectric layer. The N-type source region and the N-type drain region are disposed in the substrate at two sides of the gate, respectively. The N-type doped region is disposed in the N-type drain region and connects to the top of the N-type drain region. The P-type doped region is disposed under the N-type drain region and connects to the bottom of the N-type drain region.