Patents by Inventor Chieh Yang

Chieh Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240165676
    Abstract: A removal method applied to an aluminum electrode sheet with an oxide layer, including a soaking step. The soaking step includes soaking the aluminum electrode sheet in an ionic liquid to remove the oxide layer, such that the aluminum electrode sheet has an exposed part of aluminum metal, and the soaking step is performed in a nitrogen atmosphere.
    Type: Application
    Filed: May 30, 2023
    Publication date: May 23, 2024
    Applicant: APh ePower Co., Ltd.
    Inventors: Jui-Hsuan Wu, Shih Po Ta Tsai, Chun-Chieh Yang, Shih-Min Chen
  • Publication number: 20240170727
    Abstract: A manufacturing method of an aluminum battery includes: providing an aluminum electrode sheet having an oxide layer; soaking the aluminum electrode sheet in a first ionic liquid in a nitrogen atmosphere to remove the oxide layer, such that the aluminum electrode sheet has an exposed part of aluminum metal; removing the aluminum electrode sheet from the first ionic liquid and used as a negative electrode of the aluminum battery; and providing electrolyte. The exposed part of aluminum metal is in direct contact with the electrolyte.
    Type: Application
    Filed: May 31, 2023
    Publication date: May 23, 2024
    Applicant: APh ePower Co., Ltd.
    Inventors: Jui-Hsuan Wu, Shih Po Ta Tsai, Chun-Chieh Yang, Shih-Min Chen
  • Patent number: 11990550
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure formed over a fin structure, and a source/drain (S/D) epitaxial layer formed in the fin structure and adjacent to the gate structure. The semiconductor structure also includes a S/D silicide layer formed on the S/D epitaxial layer, and the S/D silicide layer has a first width, the S/D epitaxial layer has a second width, and the first width is smaller than the second width. The semiconductor structure includes a dielectric spacer between the gate structure and the S/D silicide layer, and a top surface of the dielectric spacer is lower than a top surface of the gate structure.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Wang, Yu-Ting Lin, Yueh-Ching Pai, Shih-Chieh Chang, Huai-Tei Yang
  • Publication number: 20240161341
    Abstract: In various examples, sensor configuration for autonomous or semi-autonomous systems and applications is described. Systems and methods are disclosed that may use image feature correspondences between camera images along with an assumption that image features are locally planar to determine parameters for calibrating an image sensor with a LiDAR sensor and/or another image sensor. In some examples, an optimization problem is constructed that attempts to minimize a geometric loss function, where the geometric loss function encodes the notion that corresponding image features are views of a same point on a locally planar surface (e.g., a surfel or mesh) that is constructed from LiDAR data generated using a LiDAR sensor. In some examples, performing such processes to determine the calibration parameters may remove structure estimation from the optimization problem.
    Type: Application
    Filed: February 8, 2023
    Publication date: May 16, 2024
    Inventors: Ayon Sen, Gang Pan, Cheng-Chieh Yang, Yue Wu
  • Publication number: 20240161342
    Abstract: In various examples, sensor configuration for autonomous or semi-autonomous systems and applications is described. Systems and methods are disclosed that may use image feature correspondences between camera images along with an assumption that image features are locally planar to determine parameters for calibrating an image sensor with a LiDAR sensor and/or another image sensor. In some examples, an optimization problem is constructed that attempts to minimize a geometric loss function, where the geometric loss function encodes the notion that corresponding image features are views of a same point on a locally planar surface (e.g., a surfel or mesh) that is constructed from LiDAR data generated using a LiDAR sensor. In some examples, performing such processes to determine the calibration parameters may remove structure estimation from the optimization problem.
    Type: Application
    Filed: February 8, 2023
    Publication date: May 16, 2024
    Inventors: Ayon Sen, Gang Pan, Cheng-Chieh Yang, Yue Wu
  • Patent number: 11984220
    Abstract: A virtual consultation method and an electronic device are provided. The method includes: receiving physiological information obtained through sensing a user by a sensing device; analyzing the physiological information to obtain an analysis result; adjusting weights of a plurality of questions according to the analysis result and determining a first question applicable to the user and an order of the first question according to the weights; and outputting the first question according to the order to simulate a question asked by a doctor for the user during consultation.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: May 14, 2024
    Assignees: KURA CARE LLC, KURA MED INC.
    Inventors: Kai-Chieh Yang, Chih-Wei Chiu, Alvin Hsu
  • Publication number: 20240149315
    Abstract: The present invention discloses a microwave heating system for desorbing contaminated soil, comprising: a feeding module; a heating cavity; a first microwave suppression cavity; a second microwave suppression cavity; a conveyor belt; a feeding device; and an exhaust module. The feeding device is arranged above the first microwave suppression cavity or the second microwave suppression cavity, and the feeding device contains a microwave absorber material. The invention further discloses a microwave heating process for desorption of polluted soil. With the microwave heating system and process for desorbing contaminated soil, the contaminated soil can be heated quickly and uniformly, and quickly cooled and taken out smoothly.
    Type: Application
    Filed: September 7, 2023
    Publication date: May 9, 2024
    Inventors: Tsung-Chih YU, Tung-Chieh YANG, Wu-Yeh LEE, Min-Hang WENG
  • Publication number: 20240150017
    Abstract: A hanging structure applicable to an unmanned aerial vehicle includes a hook-shaped body and at least one hook claw. The hook-shaped body has a bottom, at least one pivoting end, and an abutting portion. A hook opening is provided between the at least one pivoting end and the abutting portion and is opposite to the bottom. In addition, the at least one hook claw has a pivoting portion, and a first claw portion and a second claw portion that extend from the pivoting portion, respectively. The pivoting portion is pivoted to the at least one pivoting end. The second claw portion is heavier than the first claw portion. When the hanging structure is in a hanging state, a first end of the first claw portion abuts against the abutting portion, and the hook opening is closed. An unmanned aerial vehicle hanging system including the above hanging structure is further provided.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: TAI-YUAN WANG, I-TA YANG, YING-CHIEH CHEN
  • Publication number: 20240154215
    Abstract: An aluminum plastic film for a lithium battery and a method for manufacturing the same are provided. The method includes steps as follows: preparing a polyolefin adhesive; coating the polyolefin adhesive onto one surface of an aluminum foil layer; disposing an inner polyolefin layer onto the polyolefin adhesive; and drying the polyolefin adhesive, so that a polyolefin adhesive layer is formed between the aluminum foil layer and the inner polyolefin layer. Components of the polyolefin adhesive include a modified polyolefin polymer and a hardener. The modified polyolefin polymer has a modified group, a structure of the modified group contains maleic anhydride, and a molecular weight of the modified polyolefin polymer ranges from 100,000 g/mol to 200,000 g/mol.
    Type: Application
    Filed: February 17, 2023
    Publication date: May 9, 2024
    Inventors: TE-CHAO LIAO, SHIOU-YEH SHENG, TENG-KO MA, CHING-YAO YUAN, Chao-Hsien Lin, CHIA-YU LIN, YUN-BIN HSI, HAN-YI LEE, SHUN-CHIEH YANG
  • Publication number: 20240152288
    Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
    Type: Application
    Filed: January 15, 2024
    Publication date: May 9, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Tsung-Chieh Yang, Chun-Chieh Kuo, Ching-Hui Lin, Yang-Chih Shen
  • Publication number: 20240154624
    Abstract: A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programing and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.
    Type: Application
    Filed: January 15, 2024
    Publication date: May 9, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Tsung-Chieh Yang, Hong-Jung Hsu
  • Patent number: 11978664
    Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Li-Chieh Wu, Chun-Wei Hsu
  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Patent number: 11973127
    Abstract: Semiconductor structures and method for forming the same are provide. The semiconductor structure includes a fin structure protruding from a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes an Arsenic-doped region formed in the fin structure and a source/drain structure formed over the Arsenic-doped region. In addition, a bottommost portion of the Arsenic-doped region is lower than a bottommost portion of the source/drain structure.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shahaji B. More, Shih-Chieh Chang, Cheng-Han Lee, Huai-Tei Yang
  • Publication number: 20240133928
    Abstract: An abnormal detection circuit is provided. The abnormal detection circuit includes a conversion circuit, a voltage detection circuit, and a warning circuit. The conversion circuit receives a three-phase alternating current (AC) power and converts the three-phase AC power into a driving power. The voltage detection circuit detects each phase of the three-phase AC power. When a voltage value of at least one phase AC power of the three-phase AC power is abnormal, the voltage detection circuit uses the driving power to output at least one control signal corresponding to the abnormality. The warning circuit is driven by receiving the driving power and outputs at least one warning signal corresponding to the abnormality in response to the at least one control signal.
    Type: Application
    Filed: December 7, 2022
    Publication date: April 25, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Wen-Cheng Liang, Teng-Chieh Yang, Chi-Tien Sun
  • Publication number: 20240134807
    Abstract: The invention relates to a logic control device of a serial peripheral interface, a master-slave system and a master-slave switchover method therefor. The logic control device is connected between N masters and M slaves, and define master-slave connection relationships between each of the masters and each of the slaves. Each of the master-slave connection relationship is that each of the masters and each of the slaves transmit information one-to-one at the same time, and includes connecting the logic control device between the masters and the slaves to form the master-slave system as well as the master-slave switchover method therefor.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: CHUN CHIEH WANG, CHENG YU WANG, JIN KAI YANG
  • Publication number: 20240128420
    Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Tai-Tso Lin, Wen-Hsien Tseng, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
  • Publication number: 20240127894
    Abstract: A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.
    Type: Application
    Filed: November 21, 2023
    Publication date: April 18, 2024
    Inventor: Tsung-Chieh Yang
  • Publication number: 20240128216
    Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
  • Patent number: D1027131
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: May 14, 2024
    Assignee: GLOBE UNION INDUSTRIAL CORP.
    Inventors: Yu-Chien Yang, Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai