Patents by Inventor Chien-Hsin Huang

Chien-Hsin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240176093
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
  • Publication number: 20240101784
    Abstract: A novel additive for recycling thermoset materials, its related recyclable thermoset composition and its application are disclosed. Specifically, the composition of the additive comprises at least one copolymer that has at least one carbamate group, at least one carbonate group and/or at least one urea group, and a number-average molecular weight of the copolymer is between 100 and 50,000 Da.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 28, 2024
    Inventors: Chien-Hsin Wu, Ying-Chi Huang, Ying-Feng Lin, Wen-Chang Chen, Ho-Ching Huang, Ru-Jong Jeng
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240079884
    Abstract: A battery balancing system includes a voltage sensing unit, a characteristic voltage selector and a control unit. The voltage sensing unit senses a battery voltage of each of the batteries connected in series in a battery group and generates corresponding battery voltage sensing signals. The characteristic voltage selector generates a characteristic voltage according to the battery voltage sensing signals. The control unit compares the characteristic voltage with a threshold voltage in a balance operation mode, to adaptively adjust the threshold voltage, and compares the battery voltage sensing signal with the adjusted threshold voltage to generate a battery balancing command, thereby executing a charge removal balancing command or a charge supplying balancing command on the corresponding battery, or thereby cease executing the charge removal balancing command or cease executing the charge supplying balancing command on the corresponding battery.
    Type: Application
    Filed: July 23, 2023
    Publication date: March 7, 2024
    Inventors: Chung-Jen Chou, Chien-Chin Huang, Shih-Hsin Tseng
  • Patent number: 10825588
    Abstract: Herein disclosed is a voltage dividing resistor comprising a resistance bar and a plurality of dividing connectors. The resistance bar has a first end and a second end and provides a first current path, which stretches from the first end to the second end along the resistance bar. The distance between the first end and the second end is less than the length of the first current path. The first and second ends are configured to be electrically connected to a power source. The dividing connectors are electrically connected to different locations on the first current path. Each of the dividing connectors has a contact pad. The resistance bar is not coplanar with the contact pads. A divided voltage is obtained from a pair of dividing connectors chosen from the plurality of dividing connectors.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: November 3, 2020
    Assignee: CHROMA ATE INC.
    Inventors: Chung-Lin Liu, Chien-Hsin Huang, Wen-Chung Chen
  • Publication number: 20200168371
    Abstract: Herein disclosed is a resistor comprising a resistance bar and a plurality of dividing connectors. The resistance bar has a first end and a second end and provides a first current path, which stretches from the first end to the second end along the resistance bar. The distance between the first end and the second end is less than the length of the first current path. The first and second ends are configured to be electrically connected to a power source. The dividing connectors are electrically connected to different locations on the first current path. Each of the dividing connectors has a contact pad. The resistance bar is not coplanar with the contact pads. A divided voltage is obtained from a pair of dividing connectors chosen from the plurality of dividing connectors.
    Type: Application
    Filed: October 7, 2019
    Publication date: May 28, 2020
    Inventors: Chung-Lin LIU, Chien-Hsin HUANG, Wen-Chung CHEN
  • Patent number: 9988264
    Abstract: A method of fabricating an integrated structure for MEMS device and semiconductor device comprises steps of: providing a substrate having a transistor thereon in a semiconductor device region and a first MEMS component thereon in a MEMS region; performing a interconnect process on the substrate in the semiconductor device region to form a plurality of first dielectric layers, at least a conductive plug and at least a conductive layer in the first dielectric layers; forming a plurality of second dielectric layers and an etch stopping device in the second dielectric layers on the substrate in a etch stopping device region; forming a plurality of third dielectric layers and at least a second MEMS component in the third dielectric layers on the substrate in the MEMS region; and performing an etching process to remove the third dielectric layers in the MEMS region.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: June 5, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bang-Chiang Lan, Li-Hsun Ho, Wei-Cheng Wu, Hui-Min Wu, Min Chen, Tzung-I Su, Chien-Hsin Huang
  • Patent number: 9783408
    Abstract: A structure of micro-electro-mechanical systems (MEMS) electroacoustic transducer is disclosed. The MEMS electroacoustic transducer includes a substrate having a MEMS device region, a diaphragm having openings and disposed in the MEMS device region, a silicon material layer disposed on the diaphragm and sealing the diaphragm, and a conductive pattern disposed beneath the diaphragm in the MEMS device region. Preferably, a first cavity is also formed between the diaphragm and the substrate.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: October 10, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bang-Chiang Lan, Ming-I Wang, Li-Hsun Ho, Hui-Min Wu, Min Chen, Chien-Hsin Huang
  • Patent number: 9331391
    Abstract: A mobile device includes a substrate, a ground element, and a radiation branch. The ground element includes a ground branch, wherein an edge of the ground element has a notch extending into an interior of the ground element so as to form a slot region, and the ground branch partially surrounds the slot region. The radiation branch is substantially inside the slot region, and is coupled to the ground branch of the ground element. The ground branch and the radiation branch form an antenna structure.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: May 3, 2016
    Assignee: HTC Corporation
    Inventors: Chih-Ling Chien, Chien-Hsin Huang, Hsiao-Wei Wu, Wen-Hsiung Shih
  • Patent number: 9150407
    Abstract: A method for fabricating a microelectromechanical system (MEMS) device of the present invention includes the following steps: providing a substrate, comprising a circuit region and a MEMS region separated from each other; forming an interconnection structure on the substrate in the circuit region, and simultaneously forming a plurality of dielectric layers and a first electrode on the substrate in the MEMS region, wherein the first electrode comprises at least two metal layers formed in the dielectric layers and a protection ring formed in the dielectric layers and connecting two adjacent metal layers, so as to define an enclosed space between the two adjacent metal layers; forming a second electrode on the first electrode; and removing the dielectric layers outside the enclosed space in the MEMS region to form a cavity between the electrodes.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: October 6, 2015
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Tzung-Han Tan, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang, Meng-Jia Lin
  • Publication number: 20150004732
    Abstract: A method of fabricating an integrated structure for MEMS device and semiconductor device comprises steps of: providing a substrate having a transistor thereon in a semiconductor device region and a first MEMS component thereon in a MEMS region; performing a interconnect process on the substrate in the semiconductor device region to form a plurality of first dielectric layers, at least a conductive plug and at least a conductive layer in the first dielectric layers; forming a plurality of second dielectric layers and an etch stopping device in the second dielectric layers on the substrate in a etch stopping device region; forming a plurality of third dielectric layers and at least a second MEMS component in the third dielectric layers on the substrate in the MEMS region; and performing an etching process to remove the third dielectric layers in the MEMS region.
    Type: Application
    Filed: September 18, 2014
    Publication date: January 1, 2015
    Inventors: Bang-Chiang Lan, Li-Hsun Ho, Wei-Cheng Wu, Hui-Min Wu, Min Chen, Tzung-I Su, Chien-Hsin Huang
  • Patent number: 8872287
    Abstract: The present invention relates to an integrated structure for a MEMS device and a semiconductor device and a method of fabricating the same, in which an etch stopping element is included on a substrate between the MEMS device and the semiconductor device for protecting the semiconductor device from lateral damage when an oxide releasing process is performed to fabricate the MEMS device. The etch stopping element has various profiles and is selectively formed by an individual fabricating process or is simultaneously formed with the semiconductor device in the same fabricating process. It is a singular structure or a combined stacked multilayered structure, for example, a plurality of rows of pillared etch-resistant material plugs, one or a plurality of wall-shaped etch-resistant material plugs, or a multilayered structure of a stack of which and an etch-resistant material layer.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: October 28, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Bang-Chiang Lan, Li-Hsun Ho, Wei-Cheng Wu, Hui-Min Wu, Min Chen, Tzung-I Su, Chien-Hsin Huang
  • Patent number: D732498
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: June 23, 2015
    Assignee: HTC CORPORATION
    Inventors: Chien-Hsin Huang, Hsiao-Chuan Huang, Chih-Ling Chien
  • Patent number: D754090
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: April 19, 2016
    Assignee: HTC Corporation
    Inventors: Chih-Wei Tai, Chien-Hsin Huang, Meng-Sheng Chiang
  • Patent number: D760681
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: July 5, 2016
    Assignee: HTC CORPORATION
    Inventors: Chen-Pang Chuang, Chien-Hsin Huang, Meng-Sheng Chiang
  • Patent number: D789316
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: June 13, 2017
    Assignee: HTC CORPORATION
    Inventors: Chin-Wei Chou, Chien-Hsin Huang, Meng-Sheng Chiang
  • Patent number: D810726
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: February 20, 2018
    Assignee: HTC Corporation
    Inventors: Chin-Wei Chou, Yi-Shen Wang, Chien-Hsin Huang, Meng-Sheng Chiang, Lee-Wei Chen, Yien-chun Kuo, Hung-Yu Chen
  • Patent number: D879754
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: March 31, 2020
    Assignee: HTC CORPORATION
    Inventors: Chin-Wei Chou, Yi-Shen Wang, Chien-Hsin Huang, Meng-Sheng Chiang
  • Patent number: D885362
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: May 26, 2020
    Assignee: HMD Global Oy
    Inventor: Chien-Hsin Huang
  • Patent number: D926160
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: July 27, 2021
    Assignee: HMD Global Oy
    Inventor: Chien-Hsin Huang