Abstract: An implantable micro-biosensor a substrate, a first electrode, a second electrode, a third electrode, and a chemical reagent layer. The first electrode is disposed on the substrate and used as a counter electrode. The second electrode is disposed on the substrate and spaced apart from the first electrode. The third electrode is disposed on the substrate and used as a working electrode. The chemical reagent layer at least covers a sensing section of the third electrode so as to permit the third electrode to selectively cooperate with the first electrode or the first and second electrodes to measure a physiological signal in response to the physiological parameter of the analyte.

Abstract: An implantable micro-biosensor a substrate, a first electrode, a second electrode, a third electrode, and a chemical reagent layer. The first electrode is disposed on the substrate and used as a counter electrode. The second electrode is disposed on the substrate and spaced apart from the first electrode. The third electrode is disposed on the substrate and used as a working electrode. The chemical reagent layer at least covers a sensing section of the third electrode so as to permit the third electrode to selectively cooperate with the first electrode or the first and second electrodes to measure a physiological signal in response to the physiological parameter of the analyte.

Abstract: A MEMS capacitance microphone includes a substrate, a diaphragm, a back plate structure and a plurality of support structures. The substrate is provided with a plurality of gate structures and a cavity penetrating through the substrate, and the gate structures extend from an inner wall of the cavity to the center of the cavity. The diaphragm is vibratably arranged on one side of the substrate and includes a main deformation zone and a non-main deformation zone. The back plate structure is arranged on the diaphragm, and the diaphragm is located between the substrate and the back plate structure. The support structures are arranged on the back plate structure, penetrate the periphery of the main deformation zone, and respectively abut against the gate structures. The MEMS capacitance microphone has higher rigidity of a back plate, and is capable of greatly reducing the impedance of air to increase its signal-to-noise ratio.

Abstract: The present disclosure relates to an electronic load apparatus. An embodiment of the present disclosure includes an electronic load apparatus including: a measurement resistor, a reference circuit, a transistor, and a feedback circuit. The measurement resistor includes a first contact, a second contact, a third contact, and a fourth contact. The first contact and the second contact are located at a first end of the measurement resistor. The third contact and the fourth contact are located at a second end of the measurement resistor. A reference power (or a reference voltage) electrically connects to the reference circuit. The reference circuit and the first contact of the measurement resistor are electrically connected. The transistor includes a drain, a gate, and a source. The reference circuit and the gate of the transistor are electrically connected. One of the source and the drain of the transistor electrically connects to the second contact of the measurement resistor.

Abstract: A hardware control system and a hardware control method are provided. The hardware control system is for controlling a function circuit, and includes a first transformation circuit, a second transformation circuit and an analysis circuit. The first transformation circuit transforms a command from an operating system to an intermediate address. The second transformation circuit transforms the intermediate address to a permission physical address according to an identifier of the operating system, wherein the permission physical address consists of a hardware physical address and a permission value. The analysis circuit analyzes the permission physical address to generate the hardware physical address and the permission value, and determines a control value corresponding to the hardware physical address according to the permission value. The control value is for permitting the operating system to control the function circuit.

Abstract: The present disclosure relates to an electronic load apparatus. An embodiment of the present disclosure includes an electronic load apparatus including: a measurement resistor, a reference circuit, a transistor, and a feedback circuit. The measurement resistor includes a first contact, a second contact, a third contact, and a fourth contact. The first contact and the second contact are located at a first end of the measurement resistor. The third contact and the fourth contact are located at a second end of the measurement resistor. A reference power (or a reference voltage) electrically connects to the reference circuit. The reference circuit and the first contact of the measurement resistor are electrically connected. The transistor includes a drain, a gate, and a source. The reference circuit and the gate of the transistor are electrically connected. One of the source and the drain of the transistor electrically connects to the second contact of the measurement resistor.

Abstract: An electronic load device includes a main board and a load module. The main board has a plurality of first connecting ports. The load module includes a sub board and a heat-dissipating unit. The sub board has a second connecting port and a pin-hole port. The second connecting port is used for detachably connecting one of the plurality of first connecting ports. The pin-hole port is used for connecting a power component. The heat-dissipating unit has a cylindrical body and a plurality of heat-dissipating fins. The cylindrical body is defined with an outer surface and an inner surface opposite to the outer surface. The plurality of heat-dissipating fins is connected with the outer surface. When the power component is connected to the pin-hole port, the power component contacts the inner surface.

Abstract: Herein disclosed is an error warning module, installed in an electronic device, comprising a detection unit and a processing unit. The detection unit detects a current or a voltage being transmitted by the electronic device to generate a current detection signal or a voltage detection signal. The processing unit, electrically connected to the detection unit, determines whether a current detection value indicated by the current detection signal exceeds a current setting range, or whether a voltage detection value indicated by the voltage detection signal exceeds a voltage setting range. When the current detection value exceeds the current setting range or the voltage detection value exceeds the voltage setting range, the processing unit generates a warning signal.

Abstract: An electronic load apparatus is provided and adapted to allow an enhanced driving circuit to be disposed between a voltage-dividing circuit and power components to ensure the driving capability of the power components not coupled to a control circuit to thereby adjust a response voltage quickly, shorten a response time period and thus increase overall response speed, suppress transient voltage variation and thus preclude a signal delay otherwise arising from a load circuit, allow the power components series-connected in an electronic load apparatus to be driven quickly, reduce the risk of damaging the power components, and enhance the stability and reliability of the electronic load apparatus.

Abstract: An electronic load apparatus is provided and adapted to allow an enhanced driving circuit to be disposed between a voltage-dividing circuit and power components to ensure the driving capability of the power components not coupled to a control circuit to thereby adjust a response voltage quickly, shorten a response time period and thus increase overall response speed, suppress transient voltage variation and thus preclude a signal delay otherwise arising from a load circuit, allow the power components series-connected in an electronic load apparatus to be driven quickly, reduce the risk of damaging the power components, and enhance the stability and reliability of the electronic load apparatus.

Abstract: An electronic load device includes a main board and a load module. The main board has a plurality of first connecting ports. The load module includes a sub board and a heat-dissipating unit. The sub board has a second connecting port and a pin-hole port. The second connecting port is used for detachably connecting one of the plurality of first connecting ports. The pin-hole port is used for connecting a power component. The heat-dissipating unit has a cylindrical body and a plurality of heat-dissipating fins. The cylindrical body is defined with an outer surface and an inner surface opposite to the outer surface. The plurality of heat-dissipating fins is connected with the outer surface. When the power component is connected to the pin-hole port, the power component contacts the inner surface.

Abstract: A 3D printed product post-processing device includes a main body, a lifting mechanism and a vacuum pipeline. An operating chamber is defined in the main body. A cavity and at least one primary recovery opening disposed adjacent to a side of the cavity are defined on a bottom surface of the operating chamber. At least one access hole is arranged on one side of the operating chamber and an operating window is arranged on the operating chamber. A floating powder recovery opening is arranged on top of the other side of the operating chamber. The lifting mechanism is accommodated in the cavity. The vacuum pipeline is respectively connected to the primary recovery opening and the floating powder recovery opening. The floating powders are removed through the floating powder recovery opening to maintain the operating window clean. Therefore, a post-processing operation can be facilitated.

Abstract: A hardware control method and a hardware control system. The hardware control method is for an operating system to control at least one function circuit. The hardware control method includes: converting a first virtual address and a second virtual address from the operating system to a first intermediate address and a second intermediate address, respectively; converting the first intermediate address and the second intermediate address to a first extended physical address and a second extended physical address, respectively, wherein a starting position of the first extended physical address is distanced by a gap from a starting position of the second extended physical address; and converting the first extended physical address and the second extended physical address to a first hardware physical address and a second hardware physical address, respectively, wherein the first hardware physical address is adjacent to the second hardware physical address.

Abstract: A 3D printed product post-processing device includes a main body, a lifting mechanism and a vacuum pipeline. An operating chamber is defined in the main body. A cavity and at least one primary recovery opening disposed adjacent to a side of the cavity are defined on a bottom surface of the operating chamber. At least one access hole is arranged on one side of the operating chamber and an operating window is arranged on the operating chamber. A floating powder recovery opening is arranged on top of the other side of the operating chamber. The lifting mechanism is accommodated in the cavity. The vacuum pipeline is respectively connected to the primary recovery opening and the floating powder recovery opening. The floating powders are removed through the floating powder recovery opening to maintain the operating window clean. Therefore, a post-processing operation can be facilitated.

Abstract: Disclosed are a 3D laser printer and its operation method. The 3D laser printer includes a body, a powder paving mechanism, a mobile preheating mechanism and a laser module. The body has a chamber, a carrying platform disposed in the chamber, and a feeding machine and a construction machine capable of descending and ascending with respect to the carrying platform. The powder paving mechanism is accommodated in the chamber and capable of moving reciprocately between the feeding machine and the construction machine. The mobile preheating mechanism is accommodated in the chamber and capable of moving reciprocately in at least one of the feeding machine and construction machine. The laser module is configured to be corresponsive to the construction machine. Therefore, non-heat resistant components such as a color printer head and a motor can be installed into the chamber directly to achieve the effects of diversified function and simple installation.

Abstract: A memory control device and a memory control method. The memory control method includes: receiving a physical address of a memory from a function circuit; searching a lookup table according to the physical address to determine a range identifier; searching a permission lookup table according to a device identifier corresponding to the function circuit and the range identifier to determine an operation permission of the function circuit for operating the physical address of the memory.

Abstract: A hardware control method and a hardware control system. The hardware control method is for an operating system to control at least one function circuit. The hardware control method includes: converting a first virtual address and a second virtual address from the operating system to a first intermediate address and a second intermediate address, respectively; converting the first intermediate address and the second intermediate address to a first extended physical address and a second extended physical address, respectively, wherein a starting position of the first extended physical address is distanced by a gap from a starting position of the second extended physical address; and converting the first extended physical address and the second extended physical address to a first hardware physical address and a second hardware physical address, respectively, wherein the first hardware physical address is adjacent to the second hardware physical address.

Abstract: A hardware control system and a hardware control method are provided. The hardware control system is for controlling a function circuit, and includes a first transformation circuit, a second transformation circuit and an analysis circuit. The first transformation circuit transforms a command from an operating system to an intermediate address. The second transformation circuit transforms the intermediate address to a permission physical address according to an identifier of the operating system, wherein the permission physical address consists of a hardware physical address and a permission value. The analysis circuit analyzes the permission physical address to generate the hardware physical address and the permission value, and determines a control value corresponding to the hardware physical address according to the permission value. The control value is for permitting the operating system to control the function circuit.

Abstract: Light emitting diodes and display systems are disclosed. In an embodiment a light emitting diode (150) includes a p-n diode (120) including a mesa structure (129) that protrudes from a base structure (131). A reflective metallization (130) laterally surrounds the mesa structure, which also includes a quantum well layer of the p-n diode.

Abstract: A multi-processor system includes a register, a thread generating circuit, a flag determining circuit, a scheduler, an adjusting circuit and an interrupt controller. The register is recorded with availability of a predetermined processor with respect to a shared peripheral interrupt. The thread generating circuit receives multiple requests, and accordingly generates multiple threads to be executed. Each time the thread generating circuit is to generate a thread, the flag determining circuit determines a real-time flag of the thread according to an attribute of the thread. The scheduler selects the predetermined processor to execute a prioritized thread. The adjusting circuit sets, according to the real-time flag of the prioritized thread, the availability for the shared peripheral interrupt recorded in the register. The interrupt controller, while assigning interrupts, takes into account the availability recorded in the register.