Patents by Inventor Chien-Hung Kuo

Chien-Hung Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162402
    Abstract: A display device includes a circuit substrate, a plurality of pad sets and a plurality of light-emitting elements. The plurality of pad sets is disposed on the circuit substrate, and each pad set includes a first pad and a second pad surrounding the first pad. The plurality of light-emitting elements is disposed above the circuit substrate, and each light-emitting element includes a first electrode, a second electrode and a light-emitting stack between the first electrode and the second electrode, wherein the first electrode is electrically connected to the first pad, the second electrode is electrically connected to the second pad, and an orthographic projection of the second electrode on the circuit substrate is overlapped with an orthographic projection of the first pad on the circuit substrate.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 16, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Wen-Hsien Tseng, Chien-Hung Kuo
  • Patent number: 11973164
    Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 30, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Che-Hung Lin, Chien-Chih Liao, Chi-Shiang Hsu, De-Shan Kuo, Chao-Hsing Chen
  • Patent number: 11908818
    Abstract: A semiconductor device includes a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump, a conductive cap over the conductive bump, and a passivation layer. The conductive pad is over the semiconductor substrate. The conductive bump is over the conductive pad, wherein the conductive bump has a stepped sidewall structure including a lower sidewall, an upper sidewall laterally offset from the lower sidewall, and an intermediary surface laterally extending from a bottom edge of the upper sidewall to a top edge of the lower sidewall. The conductive cap is over the conductive bump. The passivation layer is over the semiconductor substrate and laterally surrounds the conductive bump, wherein the passivation layer has a top surface higher than the intermediary surface of the stepped sidewall structure of the conductive bump and lower than a top surface of conductive cap.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji Lii, Kai-Di Wu, Chien-Hung Kuo, Chao-Yi Wang, Hon-Lin Huang, Zi-Zhong Wang, Chun-Mao Chiu
  • Publication number: 20220077094
    Abstract: A semiconductor device includes a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump, a conductive cap over the conductive bump, and a passivation layer. The conductive pad is over the semiconductor substrate. The conductive bump is over the conductive pad, wherein the conductive bump has a stepped sidewall structure including a lower sidewall, an upper sidewall laterally offset from the lower sidewall, and an intermediary surface laterally extending from a bottom edge of the upper sidewall to a top edge of the lower sidewall. The conductive cap is over the conductive bump. The passivation layer is over the semiconductor substrate and laterally surrounds the conductive bump, wherein the passivation layer has a top surface higher than the intermediary surface of the stepped sidewall structure of the conductive bump and lower than a top surface of conductive cap.
    Type: Application
    Filed: November 12, 2021
    Publication date: March 10, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu WU, Ching-Hui CHEN, Mirng-Ji LII, Kai-Di WU, Chien-Hung KUO, Chao-Yi WANG, Hon-Lin HUANG, Zi-Zhong WANG, Chun-Mao CHIU
  • Patent number: 11177228
    Abstract: A semiconductor device comprises a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump over the conductive pad, a conductive cap over the conductive bump, and a passivation layer over the semiconductor substrate and surrounding the conductive bump. A combination of the conductive bump and the conductive cap has a stepped sidewall profile. The passivation layer has an inner sidewall at least partially facing and spaced apart from an outer sidewall of the conductive bump.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: November 16, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji Lii, Kai-Di Wu, Chien-Hung Kuo, Chao-Yi Wang, Hon-Lin Huang, Zi-Zhong Wang, Chun-Mao Chiu
  • Patent number: 11140983
    Abstract: A slide rail assembly includes a first rail, a second rail displaceable with respect to the first rail, a third rail displaceable with respect to the second rail, a working member movably mounted on the second rail and switchable between two states, and a contact feature on the third rail. The third rail can be displaced from a retracted position to an extended position in a first direction, and when the third rail is displaced from the extended position to the retracted position in a second direction, the contact feature is brought into contact with the working member in one of the two states so as to drive and thereby retract the second rail with respect to the first rail in the second direction.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: October 12, 2021
    Assignees: King Slide Works Co., Ltd., King Slide Technology Co., Ltd.
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Chien-Hung Kuo, Chun-Chiang Wang
  • Patent number: 11127703
    Abstract: Semiconductor devices are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump. The spacer surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: September 21, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Publication number: 20210251385
    Abstract: A slide rail assembly includes a first rail, a second rail displaceable with respect to the first rail, a third rail displaceable with respect to the second rail, a working member movably mounted on the second rail and switchable between two states, and a contact feature on the third rail. The third rail can be displaced from a retracted position to an extended position in a first direction, and when the third rail is displaced from the extended position to the retracted position in a second direction, the contact feature is brought into contact with the working member in one of the two states so as to drive and thereby retract the second rail with respect to the first rail in the second direction.
    Type: Application
    Filed: June 4, 2020
    Publication date: August 19, 2021
    Inventors: KEN-CHING CHEN, SHIH-LUNG HUANG, CHIEN-HUNG KUO, CHUN-CHIANG WANG
  • Patent number: 11081459
    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: August 3, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Yu Ku, Hon-Lin Huang, Chao-Yi Wang, Chen-Shien Chen, Chien-Hung Kuo
  • Patent number: 10660436
    Abstract: A slide rail assembly includes a first rail, a second rail, a base, an elastic member and a working member. The first rail is arranged with a positioning part. The second rail is movable relative to the first rail from a retracted position along a first direction and arranged with an engaging feature. The base is movably mounted to the first rail. The working member is rotatable relative to the base and arranged with an actuating structure. The actuating structure includes first and second parts. The second part is configured to be engaged with the positioning part, so as to allow the elastic member to accumulate an elastic force along a second direction. The first part is configured to be engaged with the engaging feature. The first part is arranged with a holding feature for preventing the engaging feature from being detached from the working member along a predetermined direction.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: May 26, 2020
    Assignees: KING SLIDE TECHNOLOGY CO., LTD.
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Chien-Hung Kuo, Chun-Chiang Wang
  • Publication number: 20200035634
    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
    Type: Application
    Filed: October 7, 2019
    Publication date: January 30, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Hon-Lin Huang, Chao-Yi Wang, Chen-Shien Chen, Chien-Hung Kuo
  • Patent number: 10483226
    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: November 19, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Hon-Lin Huang, Chao-Yi Wang, Chen-Shien Chen, Chien-Hung Kuo
  • Publication number: 20190330902
    Abstract: A slide rail assembly includes a first rail, a second rail, a base, an elastic member and a working member. The first rail is arranged with a positioning part. The second rail is movable relative to the first rail from a retracted position along a first direction and arranged with an engaging feature. The base is movably mounted to the first rail. The working member is rotatable relative to the base and arranged with an actuating structure. The actuating structure includes first and second parts. The second part is configured to be engaged with the positioning part, so as to allow the elastic member to accumulate an elastic force along a second direction. The first part is configured to be engaged with the engaging feature. The first part is arranged with a holding feature for preventing the engaging feature from being detached from the working member along a predetermined direction.
    Type: Application
    Filed: September 7, 2018
    Publication date: October 31, 2019
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Chien-Hung Kuo, Chun-Chiang Wang
  • Publication number: 20190326239
    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
    Type: Application
    Filed: April 20, 2018
    Publication date: October 24, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Hon-Lin Huang, Chao-Yi Wang, Chen-Shien Chen, Chien-Hung Kuo
  • Publication number: 20190295977
    Abstract: A semiconductor device comprises a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump over the conductive pad, a conductive cap over the conductive bump, and a passivation layer over the semiconductor substrate and surrounding the conductive bump. A combination of the conductive bump and the conductive cap has a stepped sidewall profile. The passivation layer has an inner sidewall at least partially facing and spaced apart from an outer sidewall of the conductive bump.
    Type: Application
    Filed: June 10, 2019
    Publication date: September 26, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu WU, Ching-Hui CHEN, Mirng-Ji LII, Kai-Di WU, Chien-Hung KUO, Chao-Yi WANG, Hon-Lin HUANG, Zi-Zhong WANG, Chun-Mao CHIU
  • Publication number: 20190229081
    Abstract: Semiconductor devices are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump. The spacer surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Patent number: 10319695
    Abstract: A semiconductor device includes a semiconductor substrate. A pad region is disposed on the semiconductor substrate. A micro bump is disposed on the pad region. The micro bump has a first portion on the pad region and a second portion on the first portion. The first portion and the second portion have different widths. The first portion has a first width and the second portion has a second width. The first width is larger or smaller than the second width. The micro bump includes nickel and gold. The semiconductor device also includes a passivation layer overlying a portion of the pad region.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: June 11, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji Lii, Kai-Di Wu, Chien-Hung Kuo, Chao-Yi Wang, Hon-Lin Huang, Zi-Zhong Wang, Chun-Mao Chiu
  • Patent number: 10276528
    Abstract: A semiconductor device and a manufacturing method for the semiconductor device are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump a spacer and surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Publication number: 20190027452
    Abstract: A semiconductor device and a manufacturing method for the semiconductor device are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump a spacer and surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 24, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Publication number: 20190006303
    Abstract: A semiconductor device includes a semiconductor substrate. A pad region is disposed on the semiconductor substrate. A micro bump is disposed on the pad region. The micro bump has a first portion on the pad region and a second portion on the first portion. The first portion and the second portion have different widths. The first portion has a first width and the second portion has a second width. The first width is larger or smaller than the second width. The micro bump includes nickel and gold. The semiconductor device also includes a passivation layer overlying a portion of the pad region.
    Type: Application
    Filed: September 26, 2017
    Publication date: January 3, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu WU, Ching-Hui CHEN, Mirng-Ji LII, Kai-Di WU, Chien-Hung KUO, Chao-Yi WANG, Hon-Lin HUANG, Zi-Zhong WANG, Chun-Mao CHIU