Patents by Inventor CHIEN-LIEN PENG

CHIEN-LIEN PENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11122305
    Abstract: A multimedia streaming and network apparatus that includes a flash memory, a network module, an access module and a multimedia streaming module is provided. The network module includes a network processing circuit. The access module includes a flash memory controller and an access circuit. The flash memory controller controls and accesses the flash memory. The access circuit includes a network processing storage circuit, a command and data transmission circuit and an interface converting circuit. The command and data transmission circuit performs transmission of command and data between the processing storage circuit and the network processing circuit. The interface converting circuit performs transmission and interface conversion between the network processing storage circuit and the flash memory controller. The multimedia streaming module accesses the flash memory through the flash memory controller.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: September 14, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chia-Jung Chang, Chien-Lien Peng, Fu-Ching Hsu
  • Patent number: 10776051
    Abstract: A memory sharing dual-mode network communication device includes a first memory, an OTT module and a PON module. The first memory is divided into an OTT region and a PON region, and the OTT module is used to obtain an OTT service, which includes an OTT processor, a memory arbitration circuit, a first memory main controller, a bridge circuit, and a memory slave controller. The PON module includes a PON processor and a second memory main controller. The memory arbitration circuit is configured to respond to a first access request from the OTT processor or a second access request of the PON processor to access the OTT area or the PON area of the first memory through the first memory host controller, and the memory arbitration circuit further determines the priority order of the first access request and the second access request.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: September 15, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ming-Tsung Tsai, Chiu-Yun Tsai, Chien-Lien Peng, Fu-Ching Hsu
  • Publication number: 20200275137
    Abstract: A multimedia streaming and network apparatus that includes a flash memory, a network module, an access module and a multimedia streaming module is provided. The network module includes a network processing circuit. The access module includes a flash memory controller and an access circuit. The flash memory controller controls and accesses the flash memory. The access circuit includes a network processing storage circuit, a command and data transmission circuit and an interface converting circuit. The command and data transmission circuit performs transmission of command and data between the processing storage circuit and the network processing circuit. The interface converting circuit performs transmission and interface conversion between the network processing storage circuit and the flash memory controller. The multimedia streaming module accesses the flash memory through the flash memory controller.
    Type: Application
    Filed: July 30, 2019
    Publication date: August 27, 2020
    Inventors: Chia-Jung CHANG, Chien-Lien PENG, Fu-Ching HSU
  • Publication number: 20200210109
    Abstract: A memory sharing dual-mode network communication device includes a first memory, an OTT module and a PON module. The first memory is divided into an OTT region and a PON region, and the OTT module is used to obtain an OTT service, which includes an OTT processor, a memory arbitration circuit, a first memory main controller, a bridge circuit, and a memory slave controller. The PON module includes a PON processor and a second memory main controller. The memory arbitration circuit is configured to respond to a first access request from the OTT processor or a second access request of the PON processor to access the OTT area or the PON area of the first memory through the first memory host controller, and the memory arbitration circuit further determines the priority order of the first access request and the second access request.
    Type: Application
    Filed: May 14, 2019
    Publication date: July 2, 2020
    Inventors: MING-TSUNG TSAI, CHIU-YUN TSAI, CHIEN-LIEN PENG, FU-CHING HSU