Patents by Inventor Chien-Min Hsu

Chien-Min Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240193958
    Abstract: A processing method for vehicle surround view, a vehicle surround view system and an in-vehicle processing device are provided. The processing method for vehicle surround view includes the following steps: obtaining a first exterior image and a second exterior image; recognizing a first interest object in the first exterior image and a second interest object in the second exterior image; fitting the first interest object to a first geometric contour and fitting the second interest object to a second geometric contour; applying the first geometric contour and the second geometric contour on a 3D model, to obtain a ground point, a first contour position and a second contour position; obtaining a merged contour position according to the ground point; and projecting the first interest object or the second interest object at the merged contour position on a vehicle surround image.
    Type: Application
    Filed: November 30, 2023
    Publication date: June 13, 2024
    Inventors: Yen-Chun CHEN, Jiun-Shiung Chen, Chien-Chung Lee, Chi-Min Weng, Chuen-Ning Hsu
  • Publication number: 20240196762
    Abstract: A memory device includes a substrate, a transistor disposed over the substrate, an interconnect structure disposed over and electrically connected to the transistor, and a memory stack disposed between two adjacent metallization layers of the interconnect structure. The memory stack includes a bottom electrode disposed over the substrate and electrically connected to a bit line, a memory layer disposed over the bottom electrode, a selector layer disposed over the memory layer, and a top electrode disposed over the selector layer and electrically connected to a word line. Besides, at least one moisture-resistant layer is provided adjacent to and in physical contact with the selector layer, and the at least one moisture-resistant layer includes an amorphous material.
    Type: Application
    Filed: February 20, 2024
    Publication date: June 13, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Feng Hsu, Chien-Min Lee, Tung-Ying Lee, Cheng-Hsien Wu, Hengyuan Lee, Xinyu BAO
  • Patent number: 11944019
    Abstract: A memory device includes a substrate, a transistor disposed over the substrate, an interconnect structure disposed over and electrically connected to the transistor, and a memory stack disposed between two adjacent metallization layers of the interconnect structure. The memory stack includes a bottom electrode disposed over the substrate and electrically connected to a bit line, a memory layer disposed over the bottom electrode, a selector layer disposed over the memory layer, and a top electrode disposed over the selector layer and electrically connected to a word line. Besides, at least one moisture-resistant layer is provided adjacent to and in physical contact with the selector layer, and the at least one moisture-resistant layer includes an amorphous material.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Feng Hsu, Chien-Min Lee, Tung-Ying Lee, Cheng-Hsien Wu, Hengyuan Lee, Xinyu Bao
  • Patent number: 11917754
    Abstract: An antenna module comprises: a circuit board, having a three-dimensional keep-out area; an antenna, disposed on the circuit board and located in the keep-out area; and a metal piece, disposed on the circuit board and located in the keep-out area, wherein the metal piece is electrically insulated from the antenna.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: February 27, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Chien-Min Hsu
  • Patent number: 11916126
    Abstract: A semiconductor device includes a substrate and a gate structure. The gate structure is disposed on the substrate, and the gate structure includes a titanium nitride barrier layer a titanium aluminide layer, and a middle layer. The titanium aluminide layer is disposed on the titanium nitride barrier layer, and the middle layer is disposed between the titanium aluminide layer and the titanium nitride barrier layer. The middle layer is directly connected with the titanium aluminide layer and the titanium nitride barrier layer, and the middle layer includes titanium and nitrogen. A concentration of nitrogen in the middle layer is gradually decreased in a vertical direction towards an interface between the middle layer and the titanium aluminide layer.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Hsin Hsu, Huan-Chi Ma, Chien-Wen Yu, Shih-Min Chou, Nien-Ting Ho, Ti-Bin Chen
  • Publication number: 20220400549
    Abstract: An antenna module comprises: a circuit board, having a three-dimensional keep-out area; an antenna, disposed on the circuit board and located in the keep-out area; and a metal piece, disposed on the circuit board and located in the keep-out area, wherein the metal piece is electrically insulated from the antenna.
    Type: Application
    Filed: October 11, 2021
    Publication date: December 15, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Chien-Min HSU
  • Publication number: 20220201870
    Abstract: A fabrication method of a flexible electronic package device including the following steps is provided. A tolerable bending radius of the flexible electronic package device is obtained. A minimum surface curvature radius of a selected portion of an applied carrier is obtained. A relationship of the tolerable bending radius being smaller than the minimum surface curvature radius is ensured. The flexible electronic package device is disposed on the selected portion.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Chien-Min Hsu, Chih-Ming Shen, Shih-Hsien Wu
  • Patent number: 11363724
    Abstract: A fabrication method of a flexible electronic package device including the following steps is provided. A tolerable bending radius of the flexible electronic package device is obtained. A minimum surface curvature radius of a selected portion of an applied carrier is obtained. A relationship of the tolerable bending radius being smaller than the minimum surface curvature radius is ensured. The flexible electronic package device is disposed on the selected portion.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: June 14, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Min Hsu, Chih-Ming Shen, Shih-Hsien Wu
  • Patent number: 11239146
    Abstract: A package structure is provided. The package structure includes a substrate. The package structure also includes a hybrid pad disposed on the substrate. The hybrid pad includes a metal layer and a buffer layer connected to the metal layer. The Young's modulus of the buffer layer is less than the Young's modulus of the metal layer. The package structure further includes an electrically connecting structure disposed on the hybrid pad. The package structure includes a chip layer electrically connected to the electrically connecting structure. The package structure also includes a bonding pad disposed between the electrically connecting structure and the chip layer.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: February 1, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Min Hsu, Chih-Ming Shen
  • Patent number: 11061694
    Abstract: A reconfigurable data bus system comprises a driver, a receiver, a data bus and a detector. The driver stores an electrical parameter data base. The electrical parameter data base includes a plurality of different signal-to-ground ratios and a plurality of signal quality parameters corresponding to the signal-to-ground ratios. The data bus includes a plurality of signal lines electrically connected between the driver and the receiver. The detector is electrically connected to the data bus and the driver. The detector is configured to detect a current signal quality parameter of the data bus and transmit the current signal quality parameter to the driver. The driver is selectively reconfigured a current signal-to-ground ratio according to a current signal quality parameter of the data bus and the electrical parameter database.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: July 13, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Min Hsu, Shih-Hsien Wu
  • Publication number: 20210202367
    Abstract: A package structure is provided. The package structure includes a substrate. The package structure also includes a hybrid pad disposed on the substrate. The hybrid pad includes a metal layer and a buffer layer connected to the metal layer. The Young's modulus of the buffer layer is less than the Young's modulus of the metal layer. The package structure further includes an electrically connecting structure disposed on the hybrid pad. The package structure includes a chip layer electrically connected to the electrically connecting structure. The package structure also includes a bonding pad disposed between the electrically connecting structure and the chip layer.
    Type: Application
    Filed: July 8, 2020
    Publication date: July 1, 2021
    Inventors: Chien-Min HSU, Chih-Ming SHEN
  • Publication number: 20200142713
    Abstract: A reconfigurable data bus system comprises a driver, a receiver, a data bus and a detector. The driver stores an electrical parameter data base. The electrical parameter data base includes a plurality of different signal-to-ground ratios and a plurality of signal quality parameters corresponding to the signal-to-ground ratios. The data bus includes a plurality of signal lines electrically connected between the driver and the receiver. The detector is electrically connected to the data bus and the driver. The detector is configured to detect a current signal quality parameter of the data bus and transmit the current signal quality parameter to the driver. The driver is selectively reconfigured a current signal-to-ground ratio according to a current signal quality parameter of the data bus and the electrical parameter database.
    Type: Application
    Filed: November 7, 2019
    Publication date: May 7, 2020
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Min HSU, Shih-Hsien WU
  • Patent number: 10405418
    Abstract: A differential signal transmitting circuit board includes a substrate, at least two differential conductive elements, and at least one insulating element. The differential conductive elements are disposed in the substrate. The insulating element is disposed in the substrate. The insulating element is close to or contacted to the differential conductive elements. A material of the substrate has a first equivalent dielectric constant. A material of the insulating element has a second equivalent dielectric constant. The first equivalent dielectric constant is different from the second equivalent dielectric constant.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: September 3, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Min Hsu, Shih-Hsien Wu
  • Patent number: 10129974
    Abstract: A multi-layer circuit structure includes a differential transmission line pair and at least one conductive pattern. The differential transmission line pair includes first and second transmission lines disposed side by side. Each of the first and second transmission lines includes first and second segments connected to each other. An spacing between the two first segments is non-fixed, and an spacing between the two second segments is fixed. A first zone is located between the two first segments, a second zone is opposite to the first zone and located outside the first segment of the first transmission line, and a third zone is opposite to the first zone and located outside the first segment of the second transmission line. The conductive pattern is coplanar with the differential transmission line pair and disposed on at least one of the first, second and third zones.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: November 13, 2018
    Assignees: Industrial Technology Research Institute, First Hi-tec Enterprise Co., Ltd., NEXCOM International Co., Ltd.
    Inventors: Chien-Min Hsu, Min-Lin Lee, Huey-Ru Chang, Hung-I Liu, Ching-shan Chang
  • Publication number: 20180177044
    Abstract: A differential signal transmitting circuit board includes a substrate, at least two differential conductive elements, and at least one insulating element. The differential conductive elements are disposed in the substrate. The insulating element is disposed in the substrate. The insulating element is close to or contacted to the differential conductive elements. A material of the substrate has a first equivalent dielectric constant. A material of the insulating element has a second equivalent dielectric constant. The first equivalent dielectric constant is different from the second equivalent dielectric constant.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 21, 2018
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Min HSU, Shih-Hsien WU
  • Publication number: 20170273174
    Abstract: A multi-layer circuit structure includes a differential transmission line pair and at least one conductive pattern. The differential transmission line pair includes first and second transmission lines disposed side by side. Each of the first and second transmission lines includes first and second segments connected to each other. An spacing between the two first segments is non-fixed, and an spacing between the two second segments is fixed. A first zone is located between the two first segments, a second zone is opposite to the first zone and located outside the first segment of the first transmission line, and a third zone is opposite to the first zone and located outside the first segment of the second transmission line. The conductive pattern is coplanar with the differential transmission line pair and disposed on at least one of the first, second and third zones.
    Type: Application
    Filed: August 24, 2016
    Publication date: September 21, 2017
    Applicants: Industrial Technology Research Institute, First Hi-tec Enterprise Co.,Ltd., NEXCOM International Co., Ltd.
    Inventors: Chien-Min Hsu, Min-Lin Lee, Huey-Ru Chang, Hung-I Liu, Ching-shan Chang
  • Patent number: 9706656
    Abstract: A signal transmission board includes a substrate, a conductive via, a cavity and a connecting hole. The substrate has a first external surface and a second external surface. The conductive via penetrating through the substrate has a first end and a second end. The first end is disposed on the first external surface, and the second end is disposed on the second external surface. The cavity is disposed in the substrate and penetrated by the conductive via. The connecting hole disposed on the substrate has a third end and a fourth end. The third end is disposed on the first external surface, and the fourth end communicates with the cavity.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: July 11, 2017
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Min Hsu, Shih-Hsien Wu, Jing-Yao Chang, Tao-Chih Chang, Ren-Shin Cheng, Min-Lin Lee
  • Patent number: 9595754
    Abstract: A method for forming a patterned conductive structure is provided. The method includes forming a soluble layer on a surface of a substrate, wherein the soluble layer has an opening exposing a rough portion of the surface. A first conductive layer is formed on the soluble layer, wherein the first conductive layer extends onto the rough portion in the opening. The soluble layer and the first conductive layer on the soluble layer are removed, wherein a portion of the first conductive layer corresponding to the rough portion is remained on the substrate. A patterned conductive structure formed by the method is also provided.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: March 14, 2017
    Assignee: Wistron NeWeb Corp.
    Inventors: Babak Radi, Yong-Jyun Lu, Ming-Chi Chiu, Chien-Min Hsu, Shih-Hong Chen
  • Publication number: 20160192482
    Abstract: A method for forming a patterned conductive structure is provided. The method includes forming a soluble layer on a surface of a substrate, wherein the soluble layer has an opening exposing a rough portion of the surface. A first conductive layer is formed on the soluble layer, wherein the first conductive layer extends onto the rough portion in the opening. The soluble layer and the first conductive layer on the soluble layer are removed, wherein a portion of the first conductive layer corresponding to the rough portion is remained on the substrate. A patterned conductive structure formed by the method is also provided.
    Type: Application
    Filed: December 26, 2014
    Publication date: June 30, 2016
    Inventors: Babak RADI, Yong-Jyun LU, Ming-Chi CHIU, Chien-Min HSU, Shih-Hong CHEN
  • Publication number: 20160174360
    Abstract: A signal transmission board includes a substrate, a conductive via, a cavity and a connecting hole. The substrate has a first external surface and a second external surface. The conductive via penetrating through the substrate has a first end and a second end. The first end is disposed on the first external surface, and the second end is disposed on the second external surface. The cavity is disposed in the substrate and penetrated by the conductive via. The connecting hole disposed on the substrate has a third end and a fourth end. The third end is disposed on the first external surface, and the fourth end communicates with the cavity.
    Type: Application
    Filed: November 24, 2015
    Publication date: June 16, 2016
    Inventors: Chien-Min HSU, Shih-Hsien WU, Jing-Yao CHANG, Tao-Chih CHANG, Ren-Shin CHENG, Min-Lin LEE