Patents by Inventor Chien-Ming Chen
Chien-Ming Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240144467Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.Type: ApplicationFiled: January 8, 2024Publication date: May 2, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
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Patent number: 11970342Abstract: The present invention relates to a chip tray positioning device, which mainly comprises a frame body, a tray conveying module, a pulling module, a pushing module and a controller. The tray conveying module is disposed on the frame body, electrically connected to the controller and controlled to convey a chip tray from the start area to the end area. The pulling module and the pushing module are disposed on the frame body, electrically connected to the controller and controlled to cause the chip tray to be abutted against the end wall and the lateral wall of the frame body, thereby realizing the positioning of the chip tray and eliminating an error formed in the transfer process of the chip tray. In addition, the controller also controls the pushing module to knock the chip tray at a specific frequency so that the chip tray is vibrated.Type: GrantFiled: September 7, 2022Date of Patent: April 30, 2024Assignee: CHROMA ATE INC.Inventors: Chien-Ming Chen, Jui-Hsiung Chen, Chi-Wei Wang
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Patent number: 11960253Abstract: A system and a method for parameter optimization with adaptive search space and a user interface using the same are provided. The system includes a data acquisition unit, an adaptive adjustment unit and an optimization search unit. The data acquisition unit obtains a set of executed values of several operating parameters and a target parameter. The adaptive adjustment unit includes a parameter space transformer and a search range definer. The parameter space transformer performs a space transformation on a parameter space of the operating parameters according to the executed values. The search range definer defines a parameter search range in a transformed parameter space based on the sets of the executed values. The optimization search unit takes the parameter search range as a limiting condition and takes optimizing the target parameter as a target to search for a set of recommended values of the operating parameters.Type: GrantFiled: December 28, 2020Date of Patent: April 16, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Po-Yu Huang, Chun-Fang Chen, Hong-Chi Ku, Te-Ming Chen, Chien-Liang Lai, Sen-Chia Chang
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Patent number: 11937932Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.Type: GrantFiled: July 8, 2022Date of Patent: March 26, 2024Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITYInventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
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Patent number: 11938588Abstract: A control method of a grinding water flow rate during a double side grinding process. A double side grinder used includes a grinding wheel, a feed unit and a water supply device, wherein a water inlet is disposed on the feed unit. The control method includes: prepare for grinding and complete the installation of a workpiece according to an operation procedure of the double side grinder; during a process of double side grinding, the flow rate of the water inlet is set to decrease with the shortening of the teeth length of the grinding wheel, with the flow rate of the water inlet being set to have a linear relationship with the teeth length of the grinding wheel.Type: GrantFiled: March 5, 2021Date of Patent: March 26, 2024Assignee: Zhonghuan Advanced Semiconductor Technology Co., Ltd.Inventors: Chien-Ming Chen, Kin Peng Low
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Publication number: 20240092662Abstract: A method for removing a heavy metal from water includes subjecting a microbial solution containing a liquid culture of a urease-producing bacterial strain and a reaction solution containing a manganese compound and urea to a microbial-induced precipitation reaction, so as to obtain biomineralized manganese carbonate (MnCO3) particles, admixing the biomineralized MnCO3 particles with water containing a heavy metal, so that the biomineralized MnCO3 particles adsorb the heavy metal in the water to form a precipitate, and removing the precipitate from the water.Type: ApplicationFiled: February 9, 2023Publication date: March 21, 2024Inventors: Chien-Yen CHEN, Yi-Hsun HUANG, Pin-Yun LIN, Anggraeni Kumala DEWI, Koyeli DAS, Uttara SUKUL, Tsung-Hsien CHEN, Raju Kumar SHARMA, Cheng-Kang LU, Chung-Ming LU
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Publication number: 20240095177Abstract: A computing system performs partial cache deactivation. The computing system estimates the leakage power of a cache based on operating conditions of the cache including voltage and temperature. The computing system further identifies a region of the cache as a candidate for deactivation based on cache hit counts. The computing system then adjusts the size of the region for the deactivation based on the leakage power and a bandwidth of a memory hierarchy device. The memory hierarchy device is at the next level to the cache in a memory hierarchy of the computing system.Type: ApplicationFiled: August 17, 2023Publication date: March 21, 2024Inventors: Yu-Pin Chen, Jia-Ming Chen, Chien-Yuan Lai, Ya Ting Chang, Cheng-Tse Chen
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Publication number: 20240095168Abstract: A computing system performs shared cache allocation to allocate cache resources to groups of tasks. The computing system monitors the bandwidth at a memory hierarchy device that is at a next level to the cache in a memory hierarchy of the computing system. The computing system estimates a change in dynamic power from a corresponding change in the bandwidth before and after the cache resources are allocated. The allocation of the cache resources are adjusted according to an allocation policy that receives inputs including the estimated change in the dynamic power and a performance indication of task execution.Type: ApplicationFiled: August 17, 2023Publication date: March 21, 2024Inventors: Yu-Pin Chen, Jia-Ming Chen, Chien-Yuan Lai, Ya Ting Chang, Cheng-Tse Chen
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Patent number: 11929561Abstract: An antenna module includes a first antenna radiator including a feeding terminal, a second antenna radiator, a first ground radiator, a second ground radiator and a capacitive element. The second antenna radiator is disposed on one side of the first antenna radiator, and a first gap is formed between a main portion of the second antenna radiator and the first antenna radiator. The first ground radiator is disposed on another side of the first antenna radiator, and a second gap is formed between the first antenna radiator and the first antenna radiator. The second ground radiator is disposed between the second antenna radiator and the first ground radiator, and a third gap is formed between the second ground radiator and a first branch of the second antenna radiator. The capacitive element is disposed on the third gap and connects the second antenna radiator and the second ground radiator.Type: GrantFiled: July 5, 2022Date of Patent: March 12, 2024Assignee: PEGATRON CORPORATIONInventors: I-Shu Lee, Chih-Hung Cho, Hau Yuen Tan, Chien-Yi Wu, Po-Sheng Chen, Chao-Hsu Wu, Yi Chen, Hung-Ming Yu, Chih-Chien Hsieh
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Patent number: 11926017Abstract: A cleaning process monitoring system, comprising: a cleaning container comprising an inlet for receiving a cleaning solution and an outlet for draining a waste solution; a particle detector coupled to the outlet and configured to measure a plurality of particle parameters associated with the waste solution so as to provide a real-time monitoring of the cleaning process; a pump coupled to the cleaning container and configured to provide suction force to draw solution through the cleaning system; a controller coupled to the pump and the particle detector and configured to receive the plurality of particle parameters from the particle detector and to provide control to the cleaning system; and a host computer coupled to the controller and configured to provide at least one control parameter to the controller.Type: GrantFiled: May 5, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Charlie Wang, Yu-Ping Tseng, Y. J. Chen, Wai-Ming Yeung, Chien-Shen Chen, Danny Kuo, Yu-Hsuan Hsieh, Hsuan Lo
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Patent number: 11925017Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.Type: GrantFiled: January 13, 2020Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
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Publication number: 20240065367Abstract: A sports shoe is provided. The sports shoe includes a shoe vamp and a shoe sole connected to the shoe vamp. The shoe vamp includes a textile component, wherein the textile component includes thermoplastic polyester fibers. The shoe sole includes a shoe outsole and a shoe midsole foam disposed between the shoe outsole and the shoe vamp, wherein the shoe outsole includes a vulcanizate and the shoe midsole foam includes a first thermoplastic elastomer. The vulcanizate includes rubber particles, a second thermoplastic elastomer, and an interface-compatible resin, wherein the content of the rubber particles is greater than the content of the second thermoplastic elastomer. The rubber particles are dispersed in the second thermoplastic elastomer in the form of spherical particles with particle sizes of about 0.5-10 um.Type: ApplicationFiled: August 23, 2023Publication date: February 29, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jin-An WU, Che-Tseng LIN, Chien-Ming CHEN
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Patent number: 11916155Abstract: An optoelectronic package and a method for producing the optoelectronic package are provided. The optoelectronic package includes a carrier, a photonic device, a first encapsulant and a second encapsulant. The photonic device is disposed on the carrier. The first encapsulant covers the carrier and is disposed around the photonic device. The second encapsulant covers the first encapsulant and the photonic device. The first encapsulant has a topmost position and a bottommost position, and the topmost position is not higher than a surface of the photonic device.Type: GrantFiled: May 21, 2021Date of Patent: February 27, 2024Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATIONInventors: Chien-Hsiu Huang, Bo-Jhih Chen, Kuo-Ming Chiu, Meng-Sung Chou, Wei-Te Cheng, Kai-Chieh Liang, Yun-Ta Chen, Yu-Han Wang
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Patent number: 11916146Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.Type: GrantFiled: April 11, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
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Patent number: 11901213Abstract: The present invention relates to a chip transfer device capable of floatingly positioning a chip and a method for floatingly positioning a chip. When a chip is placed in a chip socket, a control unit controls an air pressure switching valve to allow at least one vent hole to be communicated with a positive air pressure source. An air flow from the positive air pressure source blows a lower surface of the chip through the vent hole, so that the at least one chip is air-floated. Accordingly, when the chip socket is communicated with the positive air pressure source, the air flow blows the lower surface of the chip in the chip socket through the vent hole, so that the chip is air-floated in the chip socket to reduce the error displacement of the chip offset.Type: GrantFiled: November 9, 2021Date of Patent: February 13, 2024Assignee: CHROMA ATE INC.Inventors: Chien-Ming Chen, Chin-Yi Ouyang
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Publication number: 20240049391Abstract: An electronic module, comprising: a first electronic device, a first circuit board disposed over the first top surface, and a second circuit board disposed under the bottom surface of the body of the first electronic device, wherein a plurality of conductors are disposed over a first lateral surface for electrically connecting the first circuit board and the second circuit board, wherein a plurality of electrodes of the electronic module are disposed on a bottom surface of the second circuit board.Type: ApplicationFiled: August 2, 2023Publication date: February 8, 2024Inventors: Chien Ming Chen, DA-JUNG CHEN, SSU-LUNG HSU
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Patent number: 11848146Abstract: A stacked electronic module includes a magnetic device comprising a magnetic body with electrodes of the magnetic device being disposed on a top and bottom surface of the magnetic body, wherein a molding body encapsulates the magnetic body, wherein conductive layers are disposed on a top and bottom surface of the molding body for electrically connected to the electrodes of the magnetic device.Type: GrantFiled: May 12, 2021Date of Patent: December 19, 2023Assignee: CYNTEC CO., LTD.Inventors: Da-Jung Chen, Chien Ming Chen
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Publication number: 20230349968Abstract: The present invention relates to an apparatus for testing a package-on-package semiconductor device, mainly comprising a pick-and-place device, a test socket, an upper chip holder, and a main controller. When a first package device is to be tested, the main controller controls the pick-and-place device to load the first package device into the test socket and then controls the pick-and-place device to transfer the upper chip holder and bring the upper chip holder into electrical contact with the first package device on the test socket so that a second package device in the upper chip holder is electrically connected to the first package device for testing. Accordingly, the upper chip holder is an independent component. Only when a test is executed, the pick-and-place device transfers the upper chip holder onto the test socket so that the second package device is electrically connected to the first package device.Type: ApplicationFiled: April 12, 2023Publication date: November 2, 2023Inventors: Chin-Yi OUYANG, Xin-Yi WU, Chien-Ming CHEN, Meng-Kung LU, Chia-Hung CHIEN
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Publication number: 20230316461Abstract: A super-resolution image reconstruction method includes acquiring a plurality of raw images, positioning the plurality of raw images, acquiring a plurality of motion vectors, setting image coordinates of a super-resolution image, adjusting image coordinates of the super-resolution image according to the plurality of motion vectors for generating a plurality of updated image coordinates, setting a first image range, adjusting coordinates of a first image range according to the plurality of motion vectors for generating a plurality of updated first image ranges, generating a plurality of second image ranges according to each updated first image range, and generating a reconstructed pixel of the super-resolution image at the image coordinates according to a plurality of weightings, the plurality of updated first image ranges, and the plurality of second image ranges.Type: ApplicationFiled: August 16, 2022Publication date: October 5, 2023Applicant: WELTREND SEMICONDUCTOR INC.Inventors: Hsuan-Ying Chen, Chien-Ming Chen, Te-Wei Hsu
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Patent number: D1024932Type: GrantFiled: March 10, 2022Date of Patent: April 30, 2024Assignee: WALSIN LIHWA CORPORATIONInventors: Ko-Ming Chen, Shih-Hsiang Wang, An-Hung Lin, Min-Chuan Wu, Shao-Pei Lin, Chien-Chung Ni, Chun-Ying Lin