Abstract: A multi-dimensional touch display device includes a multi-dimensional display device and a touch sensing device. The multi-dimensional display device is used to provide stereoscopic images with different depths. The touch sensing device connected to the multi-dimensional display device has a plurality of sensing surfaces for determining a planar coordinate and a depth of a touch input point.

Abstract: A sensor structure of a touch panel and a method of determining a touch signal generated by the same are disclosed. The sensor structure includes a plurality of sensor lines disposed on a surface of a substrate, and a control circuit electrically connected to the sensor lines. Each of the sensor lines has a plurality of conductive pads and a conductive line electrically connected the conductive pads. The control circuit receives a touch signal from one of the sensor lines. The touch signal is resulting from a touch capacitance generated between a touch and one of the conductive pads of the sensor line. The control circuit calculates the position of the touch based on the touch capacitance. In addition, the touch capacitance generated by a conductive pad close to the control circuit is larger than the touch capacitance generated by another conductive pad further away from the control circuit.

Abstract: A sensor structure of a touch panel and a method of determining a touch signal generated by the same are disclosed. The sensor structure includes a plurality of sensor lines disposed on a surface of a substrate, and a control circuit electrically connected to the sensor lines. Each of the sensor lines has a plurality of conductive pads and a conductive line electrically connected the conductive pads. The control circuit receives a touch signal from one of the sensor lines. The touch signal is resulting from a touch capacitance generated between a touch and one of the conductive pads of the sensor line. The control circuit calculates the position of the touch based on the touch capacitance. In addition, the touch capacitance generated by a conductive pad close to the control circuit is larger than the touch capacitance generated by another conductive pad further away from the control circuit.

Abstract: A driving method for a photosensor array panel including a plurality of photosensor strips, a plurality of scan lines, at least a dummy photosensor strip, and at least a dummy scan line is provided. The photosensor strips are arranged side by side and located beside the dummy photosensor strip. The scan lines are electrically connected to the photosensor strips, and the dummy scan line is electrically connected to the dummy photosensor strip. The driving method includes the following steps. First, the photosensor strips are turned on in sequence through the scan lines. When none of the photosensor strips is turned on, the dummy photosensor strip will be turned on through the dummy scan line.

Abstract: A method of positioning a coordinate suitable for a touch panel includes following steps. When a touch event occurs, the touch panel generates a corresponding detection coordinate periodically until the touch event ends. When the touch event occurs, the detection coordinate generated by the touch panel is sequentially stored. The touch event is ignored until the number of coordinates generated by the touch panel is greater than or equal to N, and N is a positive integer. When the number of coordinates generated by the touch panel is greater than or equal to N, a touch coordinate corresponding to the touch event is generated according to the last generated N detection coordinates. The above-mentioned step of generating the touch coordinate is repeated according to a cycle of generating the detection coordinate by the touch panel so as to renew the touch coordinate until the touch event ends.

Abstract: A touch device includes a touch panel, a sensing unit, and an operation unit is provided. The sensing unit is coupled to the touch panel, for scanning a scan area of the touch panel to output a touch signal. The operation unit is coupled to the sensing unit, for determining the scan area according to the touch signal. When the touch signal corresponds to a first close path, the operation unit defines a close area formed by the first close path as the first sub touch area. When the first sub touch area is undefined, the operation unit chooses a whole touch area of the touch panel as the scan area. When the first sub touch area is defined, the operation chooses the first sub touch area as the scan area.

Abstract: A surface antenna formation method to form an antenna on the surface of an antenna carrier economically by means of spraying a conducting paint into a patterned opening of a shield being covered on the antenna carrier and then employing a laser etching technique to remove burrs from the border of the antenna thus formed on the surface of the antenna carrier after removal of the shield.

Abstract: A touch input device includes a substrate, plural sensible conductive layers and plural first switch units. The substrate is provided with an upper surface, the sensible conductive layers are all configured on the upper surface and are arranged in columns and rows. The first switch units are configured on the substrate and are electrically connected with the sensible conductive layers. By the first switch units, same columns of the sensible conductive layers can conduct electrically with one another and same rows of the sensible conductive layers can conduct electrically with one another.

Abstract: A method of scanning a touch panel is provided. The present method includes following steps. First, a scan area is defined according to the coordinates of a detected touch signal. Next, the scan area is scanned during a predetermined period to detect a next touch panel. After the predetermined period, a sensing range of the touch panel is scanned to re-define the scan area. Because the scan area is smaller than the sensing range of the touch panel, the time and power consumed by the scanning operation can be both reduced by detecting the touch signals within the scan area.

Abstract: A method of positioning a coordinate suitable for a touch panel includes following steps. When a touch event occurs, the touch panel generates a corresponding detection coordinate periodically until the touch event ends. When the touch event occurs, the detection coordinate generated by the touch panel is sequentially stored. The touch event is ignored until the number of coordinates generated by the touch panel is greater than or equal to N, and N is a positive integer. When the number of coordinates generated by the touch panel is greater than or equal to N, a touch coordinate corresponding to the touch event is generated according to the last generated N detection coordinates. The above-mentioned step of generating the touch coordinate is repeated according to a cycle of generating the detection coordinate by the touch panel so as to renew the touch coordinate until the touch event ends.

Abstract: A sensor structure of a touch panel and a method of determining a touch signal generated by the same are disclosed. The sensor structure includes a plurality of sensor lines disposed on a surface of a substrate, and a control circuit electrically connected to the sensor lines. Each of the sensor lines has a plurality of conductive pads and a conductive line electrically connected the conductive pads. The control circuit receives a touch signal from one of the sensor lines. The touch signal is resulting from a touch capacitance generated between a touch and one of the conductive pads of the sensor line. The control circuit calculates the position of the touch based on the touch capacitance. In addition, the touch capacitance generated by a conductive pad close to the control circuit is larger than the touch capacitance generated by another conductive pad further away from the control circuit.

Abstract: A method for manufacturing an integrated circuit includes: performing ion implantation on a wafer to make a chip in the wafer have an original doping concentration; dividing the chip into a plurality of regions; and controlling at least one region of plurality of the regions to not have further ion implantation performed thereon, thereby making the region only have single ion implantation performed thereon utilize the original doping concentration as a doping concentration of N-wells or P-wells of transistors in the region. Additionally, the region corresponds to signal output circuits of the integrated circuit.

Abstract: A method of manufacturing antenna by laser carving comprising the following steps: to attach metal material such as copper, silver etc. onto the base plate by a method of conductive coating by spraying; and then to trim the metal material to complete the shape of an antenna by laser carving. Thereby, the size and shape of the antenna are not limited, and the antenna can be manufactured on a non-planar base plate, thus the height of the entire antenna module can be reduced.

Abstract: A semiconductor device having a capacitor is provided. The semiconductor device includes a substrate, a capacitor and a metal-oxide-semiconductor (MOS) transistor. The MOS transistor is located in a MOS transistor region of the substrate, and the MOS transistor region has a first bottom diffusion region. The capacitor is located in a capacitor region of the substrate and consisted of a second bottom diffusion region located in the substrate, a first dielectric layer located over the second bottom diffusion region, a bottom conductive layer located over the first dielectric layer, a second dielectric layer located over the bottom conductive layer, and a top conductive layer located over the second dielectric layer. The first bottom diffusion region and the second bottom diffusion region are different conductive type.

Abstract: A method for fabricating metal-oxide-semiconductor devices is provided. The method includes forming a gate dielectric layer on a substrate; depositing a polysilicon layer on the gate dielectric layer; forming a resist mask on the polysilicon layer; etching the polysilicon layer not masked by the resist mask, thereby forming a gate electrode; etching a thickness of the gate dielectric layer not covered by the gate electrode; stripping the resist mask; forming a salicide block resist mask covering the gate electrode and a portions of the remaining gate dielectric layer; etching away the remaining gate dielectric layer not covered by the salicide block resist mask, thereby exposing the substrate and forming a salicide block lug portions on two opposite sides of the gate electrode; and making a metal layer react with the substrate, thereby forming a salicide layer that is kept a distance “d” away from the gate electrode.

Abstract: A high-voltage device structure includes a high-voltage device disposed on a semiconductor substrate. The semiconductor includes an active region and an isolation region, and the high-voltage device is disposed in the active region. The high-voltage device structure includes a source diffusion region of a first conductive type, a drain region of the first conductive type, and a gate longer than the source diffusion region and the drain diffusion region so as to form spare regions on both sides of the gate. The isolation region is outside the active region and surrounds the active region. In the isolation region, an isolation ion implantation region of a second conductive type and an extended ion implantation region are disposed to prevent parasitic current from being generating between the source diffusion region and the drain diffusion region.

Abstract: A semiconductor device having a capacitor is provided. The semiconductor device includes a substrate, a capacitor and a metal-oxide-semiconductor (MOS) transistor. The MOS transistor is located in a MOS transistor region of the substrate, and the MOS transistor region has a first bottom diffusion region. The capacitor is located in a capacitor region of the substrate and consisted of a second bottom diffusion region located in the substrate, a first dielectric layer located over the second bottom diffusion region, a bottom conductive layer located over the first dielectric layer, a second dielectric layer located over the bottom conductive layer, and a top conductive layer located over the second dielectric layer. The first bottom diffusion region and the second bottom diffusion region are different conductive type.

Abstract: A high-voltage device structure includes a high-voltage device disposed on a semiconductor substrate. The semiconductor includes an active region and an isolation region, and the high-voltage device is disposed in the active region. The high-voltage device structure includes a source diffusion region of a first conductive type, a drain region of the first conductive type, and a gate longer than the source diffusion region and the drain diffusion region so as to form spare regions on both sides of the gate. The isolation region is outside the active region and surrounds the active region. In the isolation region, an isolation ion implantation region of a second conductive type and an extended ion implantation region are disposed to prevent parasitic current from being generating between the source diffusion region and the drain diffusion region.

Abstract: A method for fabricating metal-oxide-semiconductor devices is provided. The method includes forming a gate dielectric layer on a substrate; depositing a polysilicon layer on the gate dielectric layer; forming a resist mask on the polysilicon layer; etching the polysilicon layer not masked by the resist mask, thereby forming a gate electrode; etching a thickness of the gate dielectric layer not covered by the gate electrode; stripping the resist mask; forming a salicide block resist mask covering the gate electrode and a portions of the remaining gate dielectric layer; etching away the remaining gate dielectric layer not covered by the salicide block resist mask, thereby exposing the substrate and forming a salicide block lug portions on two opposite sides of the gate electrode; and making a metal layer react with the substrate, thereby forming a salicide layer that is kept a distance “d” away from the gate electrode.

Abstract: A method for fabricating metal-oxide-semiconductor devices is provided. The method includes forming a gate dielectric layer on a substrate; depositing a polysilicon layer on the gate dielectric layer; forming a resist mask on the polysilicon layer; etching the polysilicon layer not masked by the resist mask, thereby forming a gate electrode; etching a thickness of the gate dielectric layer not covered by the gate electrode; stripping the resist mask; forming a salicide block resist mask covering the gate electrode and a portions of the remaining gate dielectric layer; etching away the remaining gate dielectric layer not covered by the salicide block resist mask, thereby exposing the substrate and forming a salicide block lug portions on two opposite sides of the gate electrode; and making a metal layer react with the substrate, thereby forming a salicide layer that is kept a distance “d” away from the gate electrode.