Patents by Inventor Chien Te Tung

Chien Te Tung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220366216
    Abstract: A method and a non-transitory computer readable medium for CIM arrangement, and an electronic device applying the same are proposed. The method for CIM arrangement includes to obtain information of the number of CIM macros and information of the dimension of each of the CIM micros, to obtain information of the number of input channels and the number of output channels of a designated convolutional layer of a designate neural network, and to determine a CIM macro arrangement for arranging the CIM macros according to the number of the CIM macros, the dimension of each of the CIM macros, the number of the input channels and the number of the output channels of the designated convolutional layer of the designated neural network, for applying convolution operation to the input channels to generate the output channels.
    Type: Application
    Filed: May 13, 2022
    Publication date: November 17, 2022
    Applicant: Novatek Microelectronics Corp.
    Inventors: Chien Te Tung, Chih Feng Juan, Jen-Wei Liang
  • Publication number: 20220366947
    Abstract: A compute-in-memory (CIM) macro device and an electronic device are proposed. The CIM macro device includes a CIM cell array including multiple CIM cells. First data is being divided into at least two bit groups including a first bit group which is the most significant bits of the first data and a second bit group which is the least significant bits of the first data, and the bit groups are respectively loaded in CIM cells of different columns of the CIM cell array. The electronic device includes at least one CIM macro and at least one processing circuit. The processing circuit is configured to receive and perform operation on parallel outputs respectively corresponding to the columns of the CIM cell array, where the parallel outputs include multiple correspondences, and where each of the correspondences includes most significant bits of an output activation and least significant bits of the output activation.
    Type: Application
    Filed: May 13, 2022
    Publication date: November 17, 2022
    Applicant: Novatek Microelectronics Corp.
    Inventors: Chien Te Tung, Jen-Wei Liang, Chih Feng Juan