Abstract: A method for fabricating a semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) stack on a substrate; forming a first spin orbit torque (SOT) layer on the MTJ stack; forming a first hard mask on the first SOT layer; and using a second hard mask to pattern the first hard mask, the first SOT layer, and the MTJ stack to form a MTJ.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) stack on a substrate, forming an etch stop layer on the MTJ stack, forming a first spin orbit torque (SOT) layer on the etch stop layer, and then patterning the first SOT layer, the etch stop layer, and the MTJ stack to form a MTJ.

Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.

Abstract: A telescopic tube assembly having a fixing structure, including: a first tube having at a receiving end offset toward a predetermined direction to form an inward offset arc portion and an outward arc portion opposite to each other; a second tube having an inserting end, wherein an inner diameter of the first tube is greater than an outer diameter of the second tube; and a fastening structure disposed at the receiving end of the first tube, wherein the inserting end of the second tube is inserted into the first tube through the receiving end; by locking the fastening structure, the second tube is pushed against the inward offset arc portion and fixed with the first tube; by loosening the fastening structure, the second tube is released from the inward offset arc portion and is movable relative to the first tube.

Abstract: Provided is an LED lamp heat dissipation structure, including: a metal plate and an LED lamp substrate. The metal plate has a first predetermined shape portion, wherein a center of the metal plate is defined to have a second predetermined shape portion, an outer edge of the metal plate is formed to be a tapered portion with outward corrugations and with a center at the second predetermined shape portion, the tapered portion has a predetermined inclination angle with respect to the second predetermined shape portion, two surfaces of the second predetermined are defined as an inner surface and an outer surface, respectively, and the tapered portion surrounds the inner surface to define an inner space. The LED lamp substrate is closely attached to the inner surface. The heat generated from the LED lamp substrate can be efficiently transferred to an ambient air through the LED lamp heat dissipation structure.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.

Abstract: A method for manufacturing a nanosheet semiconductor device includes forming a poly gate on a nanosheet stack which includes at least one first nanosheet and at least one second nanosheet alternating with the at least one first nanosheet; recessing the nanosheet stack to form a source/drain recess proximate to the poly gate; forming an inner spacer laterally covering the at least one first nanosheet; and selectively etching the at least one second nanosheet.

Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.

Abstract: A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.

Abstract: A method of fabricating magnetoresistive random access memory, including providing a substrate, forming a bottom electrode layer, a magnetic tunnel junction stack, a top electrode layer and a hard mask layer sequentially on the substrate, wherein a material of the top electrode layer is titanium nitride, a material of the hard mask layer is tantalum or tantalum nitride, and a percentage of nitrogen in the titanium nitride gradually decreases from a top surface of top electrode layer to a bottom surface of top electrode layer, and patterning the bottom electrode layer, the magnetic tunnel junction stack, the top electrode layer and the hard mask layer into multiple magnetoresistive random access memory cells.

Abstract: A method for in vitro activation and/or expansion of immune cells is provided, including the steps of: a) providing magnetic particles having multi-protrusive surface modified with at least one type of immuno-inducing substance, in which each magnetic particle includes a copolymer core, a polymer layer, a magnetic substance layer, and a silicon-based layer from the inside to the outside; b) providing a cell solution including at least one type of immune cell in the cell solution; and c) bringing the magnetic particles in contact with the cell solution, in which the at least one type of immuno-inducing substance on the surface of the magnetic particle activates and/or expands the at least one type of immune cell in the cell solution.

Abstract: A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, a top electrode layer on the magnetic tunnel junction stack, and a hard mask layer on said top electrode layer, wherein the material of top electrode layer is titanium nitride, a material of said hard mask layer is tantalum or tantalum nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer.

Abstract: Some implementations described herein provide techniques and apparatuses for overcoming forces that may deflect an injector nozzle into an interior wall of a thin-film furnace. The implementations include a fixture that is coupled to the injector nozzle. The fixture is configurable to lock to a selected property of the injector nozzle to maintain, between a portion of the injector nozzle and the interior wall, a gap. In this way, the portion of the injector nozzle is prevented from colliding with the interior wall and dislodging particulates that may contaminate semiconductor product fabricated using the thin-film furnace.

Abstract: A semiconductor structure and its manufacturing method are provided. The semiconductor structure includes a substrate, a first dielectric layer on the substrate, a second dielectric layer on the first dielectric layer, a seal ring structure including first and second interconnect structures, and a passivation layer on the seal ring structure and the second dielectric layer. The first interconnect structure is located in the first dielectric layer. The second interconnect structure is located in the second dielectric layer and connected to the first interconnect structure. The passivation layer has a spacer portion covering a sidewall of the second dielectric layer and a portion of the first dielectric layer. A ditch exists in the passivation layer and the first dielectric layer. The spacer portion is located between the ditch and the seal ring structure. The semiconductor structure is able to reduce time and power of an etching process for forming the ditch.