Patents by Inventor Chien-Wei Chen

Chien-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171161
    Abstract: A frequency calibration (FCAL) circuit and a method for calibrating an oscillation frequency of a controllable oscillator are provided. The FCAL circuit includes the controllable oscillator, a divider, a time-to-digital converter (TDC) and a calibration logic. The controllable oscillator generates a controllable oscillation clock according to a calibration code. The divider divides the oscillation frequency of the controllable oscillation clock by a predetermined divisor to generate a divided clock. The TDC converts a first period between first edges of a reference clock and the divided clock into a first period code and converts a second period between second edges of the reference clock and the divided clock into a second period code. The calibration logic compares the first period code and the second period code to generate a comparison result for determining whether the first period is greater or less than the second period, and accordingly controls the calibration code.
    Type: Application
    Filed: July 18, 2023
    Publication date: May 23, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chien-Wei Chen, Kairen Fong, Chao-Ching Hung, Yu-Li Hsueh
  • Patent number: 11989005
    Abstract: A system performs adaptive thermal ceiling control at runtime. The system includes computing circuits and a thermal management module. When detecting a runtime condition change that affects power consumption in the system, the thermal management module determines an adjustment to the thermal ceiling of a computing circuit, and increases the thermal ceiling of the computing circuit according to the adjustment.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: May 21, 2024
    Assignee: MediaTek Inc.
    Inventors: Bo-Jr Huang, Jia-Wei Fang, Jia-Ming Chen, Ya-Ting Chang, Chien-Yuan Lai, Cheng-Yuh Wu, Yi-Pin Lin, Wen-Wen Hsieh, Min-Shu Wang
  • Publication number: 20240162038
    Abstract: A photomask structure including a first layout pattern and a second layout pattern is provided. The second layout pattern is located on one side of the first layout pattern. The first layout pattern and the second layout pattern are separated from each other. The first layout pattern has a first edge and a second edge opposite to each other. The second layout pattern has a third edge and a fourth edge opposite to each other. The third edge of the second layout pattern is adjacent to the first edge of the first layout pattern. The second layout pattern includes a first extension portion exceeding an end of the first layout pattern. The first extension portion includes a first protruding portion protruding from the third edge of the second layout pattern. The first protruding portion exceeds the first edge of the first layout pattern.
    Type: Application
    Filed: February 10, 2023
    Publication date: May 16, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chien Heng Liu, Chia-Wei Huang, Yung-Feng Cheng, Ming-Jui Chen
  • Publication number: 20240145433
    Abstract: A package structure includes a first die and a second die embedded in a first molding material, a first redistribution structure over the first die and the second die, a second molding material over portions of the first die and the second die, wherein the second molding material is disposed between a first portion of the first redistribution structure and a second portion of the first redistribution structure, a first via extending through the second molding material, wherein the first via is electrically connected to the first die, a second via extending through the second molding material, wherein the second via is electrically connected to the second die and a silicon bridge electrically coupled to the first via and the second via.
    Type: Application
    Filed: January 4, 2023
    Publication date: May 2, 2024
    Inventors: Po-Yao Lin, Chia-Hsiang Lin, Chien-Sheng Chen, Kathy Wei Yan
  • Patent number: 11970342
    Abstract: The present invention relates to a chip tray positioning device, which mainly comprises a frame body, a tray conveying module, a pulling module, a pushing module and a controller. The tray conveying module is disposed on the frame body, electrically connected to the controller and controlled to convey a chip tray from the start area to the end area. The pulling module and the pushing module are disposed on the frame body, electrically connected to the controller and controlled to cause the chip tray to be abutted against the end wall and the lateral wall of the frame body, thereby realizing the positioning of the chip tray and eliminating an error formed in the transfer process of the chip tray. In addition, the controller also controls the pushing module to knock the chip tray at a specific frequency so that the chip tray is vibrated.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: April 30, 2024
    Assignee: CHROMA ATE INC.
    Inventors: Chien-Ming Chen, Jui-Hsiung Chen, Chi-Wei Wang
  • Publication number: 20240136420
    Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.
    Type: Application
    Filed: December 1, 2022
    Publication date: April 25, 2024
    Applicant: AUO Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
  • Patent number: 11968869
    Abstract: An electronic device includes a flexible substrate and a conductive wire. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. The metal portion includes a plurality of extending portions and a plurality of joint portions, and each of the openings is surrounded by two of the plurality of extending portions and two of the plurality of joint portions. A ratio of a sum of widths of the plurality of extending portions to a sum of widths of the plurality of joint portions is in a range from 0.8 to 1.2.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: April 23, 2024
    Assignee: InnoLux Corporation
    Inventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
  • Publication number: 20240126001
    Abstract: A switchable backlight module is disclosed. The switchable backlight module includes two light source modules arranged parallelly with respect to a plane. Each of the light source modules includes a turning film and a LGP. The LGP is of an edge-lit type arranged parallelly under the turning film. A light ray enters the LGP from a light incident side of the LGP, exits the LGP from a light emergent surface of the LGP, enters the turning film, and exits the turning film from a surface of the turning film away from the LGP. The light incident side of the LGP of one of the light source modules is perpendicular to the light incident side of the LGP of the other light source module. The switchable backlight module is in an anti-peeping mode having a narrow viewing angle when only an upper one of the light source modules emits light.
    Type: Application
    Filed: July 19, 2023
    Publication date: April 18, 2024
    Inventors: YU-HUAN CHIU, CHIEN-WEI LIAO, YEN-LUNG CHEN
  • Patent number: 11955890
    Abstract: A switching converter circuit for switching one end of an inductor therein between plural voltages according to a pulse width modulation (PWM) signal to convert an input voltage to an output voltage. The switching converter circuit has a driver circuit including a high side driver, a low side driver, a high side sensor circuit, and a low side sensor circuit. The high side sensor circuit is configured to sense a gate-source voltage of a high side metal oxide semiconductor field effect transistor (MOSFET), to generate a low side enable signal for enabling the low side driver to switch a low side MOSFET according to the PWM signal. The low side sensor circuit is configured to sense a gate-source voltage of a low side MOSFET, to generate a high side enable signal for enabling the high side driver to switch a high side MOSFET according to the PWM signal.
    Type: Grant
    Filed: January 2, 2022
    Date of Patent: April 9, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Ting-Wei Liao, Chien-Yu Chen, Kun-Huang Yu, Chien-Wei Chiu, Ta-Yung Yang
  • Patent number: 11954847
    Abstract: An image identification method is provided, including: storing at least one normal state image of at least one test object; an automatic codec receiving the at least one normal state image to become a trained automatic codec; at least one camera device capturing at least one state image of the at least one test object; a computer device receiving the at least one state image, and the trained automatic codec performing feature extraction and reconstruction on the at least one state image to generate at least one reconstructed state image; and the computer device comparing the at least one state image and the at least one reconstructed state image, and determining whether the at least one state image is a normal state image. The present invention also provides an image identification system.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: April 9, 2024
    Assignee: TUL CORPORATION
    Inventors: Wen Jyi Hwang, Chien Hua Chen, Chien Wei Chen
  • Patent number: 11955312
    Abstract: A physical analysis method, a sample for physical analysis and a preparing method thereof are provided. The preparing method of the sample for physical analysis includes: providing a sample to be inspected; and forming a contrast enhancement layer on a surface of the sample to be inspected. The contrast enhancement layer includes a plurality of first material layers and a plurality of second material layers stacked upon one another. The first material layer and the second material layer are made of different materials. Each one of the first and second material layers has a thickness that does not exceed 0.1 nm. In an image captured by an electron microscope, a difference between an average grayscale value of a surface layer image of the sample to be inspected and an average grayscale value of an image of the contrast enhancement layer is at least 50.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: April 9, 2024
    Assignee: MATERIALS ANALYSIS TECHNOLOGY INC.
    Inventors: Chien-Wei Wu, Keng-Chieh Chu, Yung-Sheng Fang, Chun-Wei Wu, Hung-Jen Chen
  • Publication number: 20240111849
    Abstract: A media docking device includes an input circuit, an output circuit and a processing circuit. The input circuit is electrically connected to a media source device for receiving media data. The output circuit is electrically connected to a media play device. The processing circuit is electrically connected to the input circuit and the output circuit. The processing circuit determines if a verification procedure is passed. If the verification procedure is passed, the processing circuit transfers the media data to the media play device. If the verification procedure is not passed, the processing circuit limits a transmission of the media data, such that the media data will not be completely played by the media play device.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 4, 2024
    Inventors: Chien-Wei CHEN, Tsung-Han LI, You-Wen CHIOU, Kuan-Chi CHOU, Bo Yu LAI
  • Publication number: 20240113429
    Abstract: An electronic device including a bracket and an antenna is provided. The bracket includes first, second, third, and fourth surfaces. The antenna includes a radiator. The radiator includes first, second, third, and fourth portions. The first portion is located on the first surface and includes connected first and second sections. The second portion is located on the second surface and includes third, fourth, fifth, and sixth sections. The third section, the fourth section, and the fifth sections are bent and connected to form a U shape. The third portion is located on the third surface and is connected to the second section and the fourth section. The fourth portion is located on the fourth surface and is connected to the fifth section, the sixth section, and the third portion. The radiator is adapted to resonate at a low frequency band and a first high frequency band.
    Type: Application
    Filed: August 16, 2023
    Publication date: April 4, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chia-Hung Chen, Chih-Wei Liao, Hau Yuen Tan, Hao-Hsiang Yang, Shih-Keng Huang
  • Publication number: 20240114207
    Abstract: A media docking device includes an input module, an output module and a processing module. The input module is electrically connected to a media source device for receiving media data. The output module is electrically connected to a media play device. The processing module determines if an instruction is received from the media source device or a remote device. If the instruction is not received, the processing module transfers the media data to the output module to transmit to the media play device. If the instruction is received, the processing module limits a transmission of the media data according to the instruction, such that the media data will not be completely played by the media play device.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 4, 2024
    Inventors: Chien-Wei CHEN, Tsung-Han LI, You-Wen CHIOU, Kuan-Chi CHOU, Bo Yu LAI
  • Patent number: 11948938
    Abstract: In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Hsiao-Chin Tuan, Alexander Kalnitsky, Kong-Beng Thei, Shi-Chuang Hsiao, Yu-Hong Kuo
  • Publication number: 20240100352
    Abstract: A phototherapy device includes a base, at least one light conversion device and a light source module. The base has an installation slot. The light conversion device is detachably arranged in the installation slot. Each light conversion device includes a plurality of light conversion patterns. The light source module is arranged on a side of the base and configured to provide an excitation beam to the light conversion patterns, so that each of the light conversion patterns emits a converted beam. In this way, the light conversion device of the phototherapy device can be replaced according to the user's needs.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 28, 2024
    Inventors: CHUNG-JEN OU, YU-MIN CHEN, MING-WEI TSAI, CHIEN-CHIH CHEN
  • Publication number: 20240103520
    Abstract: A method of controlling movement of an autonomous mobile apparatus including a driving module, a processor, and a positioning module includes steps of: the processor moving the autonomous mobile apparatus at a default speed from a first location toward a second location along a straight path; the positioning module obtaining data related to a current location; when the processor determines that a distance between the current location and the second location is greater than a predetermined distance, the processor obtaining a deviating direction and a minimum distance of the current location relative to the straight path; the processor setting a movement speed and an angular velocity based on the deviating direction, a tolerant distance, the minimum distance, and the default speed; and the processor controlling the driving apparatus to move the autonomous mobile apparatus at the movement speed and turning the autonomous mobile apparatus at the angular velocity.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 28, 2024
    Inventors: Chien-Tung CHEN, Chung-Hou WU, Chao-Cheng CHEN, Wen-Wei CHIANG
  • Patent number: 11940828
    Abstract: A voltage tracking circuit is provided. The voltage tracking circuit includes first and second P-type transistors and a control circuit. The drain of the first P-type transistor is coupled to a first voltage terminal. The gate and the drain of the second P-type transistor are respectively coupled to the first voltage terminal and a second voltage terminal. The control circuit is coupled to the first and second voltage terminals and generates a control voltage according to the first voltage and the second voltage. The sources of the first and second P-type transistors are coupled to an output terminal of the voltage tracking circuit, and the output voltage is generated at the output terminal. In response to the second voltage being higher than the first voltage, the control circuit generates the control signal to turn off the first P-type transistor.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: March 26, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shao-Chang Huang, Yeh-Ning Jou, Ching-Ho Li, Kai-Chieh Hsu, Chun-Chih Chen, Chien-Wei Wang, Gong-Kai Lin, Li-Fan Chen
  • Patent number: 11942857
    Abstract: A power supply is provided. The power supply includes a power supply circuit and a control circuit. The power supply circuit includes a voltage converter and multiple point-of-load circuits. The voltage converter generates a third voltage according to a first voltage. The load point-of-load circuits generate at least one second voltage and at least one state signal according to the third voltage. The at least one second voltage is suitable for supplying power to a load. The control circuit is coupled to the power supply circuit. The control circuit determines whether a single event latch-up occurs in the power supply circuit according to the at least one state signal. When the single event latch-up occurs in the power supply circuit, the control circuit switches off the power supply circuit to stop generating the at least one second voltage and the at least one state signal.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: March 26, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Wei Yang, Chueh-Hao Yu, Chien-Yu Chen
  • Patent number: 11929398
    Abstract: Present disclosure provides a FinFET structure, including a substrate, a fin protruding from the substrate, including a first portion and a second portion below the first portion, wherein the first portion includes a first dopant concentration of a dopant, and the second portion includes a second dopant concentration of the dopant, the second dopant concentration is greater than the first dopant concentration, a gate over the fin, wherein the second portion of the fin is below a bottom surface of the gate, and an insulating layer over the substrate and proximal to the second portion of the fin, wherein at least a first portion of the insulating layer includes a third dopant concentration of the dopant, the third dopant concentration is greater than the first dopant concentration.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hsiung Tsai, Lai-Wan Chong, Chien-Wei Lee, Kei-Wei Chen