Patents by Inventor Chien-Yuan Tseng
Chien-Yuan Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11887967Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed by the first package body.Type: GrantFiled: October 4, 2021Date of Patent: January 30, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Shang-Ruei Wu, Chien-Yuan Tseng, Meng-Jen Wang, Chen-Tsung Chang, Chih-Fang Wang, Cheng-Han Li, Chien-Hao Chen, An-Chi Tsao, Per-Ju Chao
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Publication number: 20230111546Abstract: An image processing device includes a three-dimensional noise reduction (3D NR) circuit, an artificial intelligence noise reduction (AI NR) circuit, a weight determination circuit and an image blending circuit. The 3D NR circuit performs a 3D NR operation on input image data to generate first image data. The AI NR circuit performs an AI NR operation on the input image data to generate second image data. The weight determination circuit outputs a blending weight according to a motion index. The image blending circuit blends the first image data and the second image data according to the blending weight to generate output image data.Type: ApplicationFiled: March 30, 2022Publication date: April 13, 2023Inventors: Hsiu-Wei HO, Chien-Yuan TSENG, Ho-Tai TSAI
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Publication number: 20230104397Abstract: A selective EMI shielding structure for a semiconductor package and a method of fabrication thereof is disclosed. The semiconductor package, comprising: a substrate having a first face; at least one first electronic component mounted adjacent to a first region of the first face; a least one second electronic component mounted adjacent to a second region of the first face; and an encapsulant disposed over the first and the second electronic components, wherein the encapsulant covers directly over the first electronic component, and wherein the encapsulant covers the second electronic component through a layer of conductive material.Type: ApplicationFiled: October 1, 2021Publication date: April 6, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Meng-Jen WANG, Chien-Yuan TSENG, Hung Chen KUO, Ying-Hao WEI, Chia-Feng HSU, Yuan-Long CHIAO
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Patent number: 11286947Abstract: An impeller includes a hub, a plurality of blades provided around an outer periphery of the hub, and at least two connecting rings connected to the plurality of blades. Each of the plurality of blades has a top edge and a bottom edge opposite to the top edge. One or more of the at least two connecting rings is disposed between but not connected to the top edges and the bottom edges of the plurality of blades. A cooling fan including the impeller is also provided.Type: GrantFiled: February 26, 2020Date of Patent: March 29, 2022Assignee: Sunonwealth Electric Machine Industry Co., Ltd.Inventors: Alex Horng, Chien-Yuan Tseng, Chi-Min Wang
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Publication number: 20220028836Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the first surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed from the first package body.Type: ApplicationFiled: October 4, 2021Publication date: January 27, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shang-Ruei WU, Chien-Yuan TSENG, Meng-Jen WANG, Chen-Tsung CHANG, Chih-Fang WANG, Cheng-Han LI, Chien-Hao CHEN, An-Chi TSAO, Per-Ju CHAO
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Patent number: 11139274Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the first surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed from the first package body.Type: GrantFiled: January 31, 2020Date of Patent: October 5, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Shang-Ruei Wu, Chien-Yuan Tseng, Meng-Jen Wang, Chen-Tsung Chang, Chih-Fang Wang, Cheng-Han Li, Chien-Hao Chen, An-Chi Tsao, Per-Ju Chao
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Publication number: 20210190089Abstract: An impeller includes a hub, a plurality of blades provided around an outer periphery of the hub, and at least two connecting rings connected to the plurality of blades. Each of the plurality of blades has a top edge and a bottom edge opposite to the top edge. One or more of the at least two connecting rings is disposed between but not connected to the top edges and the bottom edges of the plurality of blades. A cooling fan including the impeller is also provided.Type: ApplicationFiled: February 26, 2020Publication date: June 24, 2021Inventors: Alex Horng, Chien-Yuan Tseng, Chi-Min Wang
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Publication number: 20200251449Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed from the first package body.Type: ApplicationFiled: January 31, 2020Publication date: August 6, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shang-Ruei Wu, Chien-Yuan Tseng, Meng-Jen Wang, Chen-Tsung Chang, Chih-Fang Wang, Cheng-Han Li, Chien-Hao Chen, An-Chi Tsao, Per-Ju Chao
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Publication number: 20170137078Abstract: A robotic vehicle includes a chassis, a cabin, a driving device, a plurality of detection devices, and a control device. The cabin is installed in the upper portion of the chassis. The driving device is positioned on the chassis for moving the robotic vehicle and rotating the cabin. A plurality of detection devices and a control device are installed for reconnoitering an area. The two sides of the chassis are coupled to track wheels, and a front portion of the chassis is coupled to a climbing support mechanism.Type: ApplicationFiled: November 4, 2016Publication date: May 18, 2017Inventor: CHIEN-YUAN TSENG
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Patent number: 9525104Abstract: This application discloses a light-emitting diode comprising a first semiconductor layer, an active layer on the first semiconductor layer, a second semiconductor layer on the active layer, and a semiconductor contact layer on the second semiconductor layer. The second semiconductor layer comprises a first sub-layer and a second sub-layer formed above the first sub-layer, wherein the material of the second sub-layer comprises AlxGa1-xN (0<x<1) and the second sub-layer has a surface comprising a structure of irregularly distributed holes.Type: GrantFiled: January 23, 2014Date of Patent: December 20, 2016Assignee: EPISTAR CORPORATIONInventors: Yu-Yao Lin, Tsun-Kai Ko, Chien-Yuan Tseng, Yen-Chih Chen, Chun-Ta Yu, Shih-Chun Ling, Cheng-Hsiung Yen, Hsin-Hsien Wu
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Patent number: 9087946Abstract: A light-emitting device comprises a first type semiconductor layer, a multi-quantum well structure on the first type semiconductor layer, and a second type semiconductor layer on the multi-quantum well structure, wherein the multi-quantum well structure comprises a first portion near the first type semiconductor layer, a second portion near the second type semiconductor layer, and a strain releasing layer between the first portion and the second portion and comprising a first layer including Indium, a second layer including Aluminum on the first layer, and a third layer including Indium on the second layer, wherein the Indium concentration of the third layer is higher than that of the first layer.Type: GrantFiled: October 26, 2012Date of Patent: July 21, 2015Assignee: Epistar CorporationInventors: Yu-Yao Lin, Yen-Chih Chen, Chien-Yuan Tseng, Tsun-Kai Ko, Chun-Ta Yu, Shih-Chun Ling, Cheng-Hsiung Yen, Hsin-Hsien Wu
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Publication number: 20140217358Abstract: This application discloses a light-emitting diode comprising a first semiconductor layer, an active layer on the first semiconductor layer, a second semiconductor layer on the active layer, and a semiconductor contact layer on the second semiconductor layer. The second semiconductor layer comprises a first sub-layer and a second sub-layer formed above the first sub-layer, wherein the material of the second sub-layer comprises AlxGa1-xN(0<x<1) and the second sub-layer has a surface comprising a structure of irregularly distributed holes.Type: ApplicationFiled: January 23, 2014Publication date: August 7, 2014Applicant: EPISTAR CORPORATIONInventors: Yu-Yao LIN, Tsun-Kai KO, Chien-Yuan TSENG, Yen-Chih CHEN, Chun-Ta YU, Shih-Chun LING, Cheng-Hsiung YEN, Hsin-Hsien WU
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Publication number: 20140167097Abstract: A method of fabricating an optoelectronic device comprising, providing a substrate, wherein the substrate comprises a first major surface and a second major surface opposite to the first major surface; forming a semiconductor epitaxial stack on the first major surface including a first conductive-type semiconductor layer having a first doping concentration, an active layer, and a second conductive-type semiconductor layer wherein the semiconductor epitaxial stack having four boundaries and a geometric center; and forming a plurality of the hollow components in the first conductive-type semiconductor layer wherein the plurality of the hollow components is formed from the boundary of the semiconductor epitaxial stack to the geometric center of the semiconductor epitaxial stack.Type: ApplicationFiled: December 12, 2013Publication date: June 19, 2014Applicant: EPISTAR CORPORATIONInventors: HSIN-HSIEN WU, YU-YAO LIN, YEN-CHIH CHEN, CHIEN-YUAN TSENG, CHUN-TA YU, CHENG-HSIUNG YEN, SHIH-CHUN LING, TSUN-KAI KO, DE-SHAN KUO
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Publication number: 20140117306Abstract: A light-emitting device comprises a first type semiconductor layer, a multi-quantum well structure on the first type semiconductor layer, and a second type semiconductor layer on the multi-quantum well structure, wherein the multi-quantum well structure comprises a first portion near the first type semiconductor layer, a second portion near the second type semiconductor layer, and a strain releasing layer between the first portion and the second portion and comprising a first layer including Indium, a second layer including Aluminum on the first layer, and a third layer including Indium on the second layer, wherein the Indium concentration of the third layer is higher than that of the first layer.Type: ApplicationFiled: October 26, 2012Publication date: May 1, 2014Applicant: EPISTAR CORPORATIONInventors: YU-YAO LIN, Yen-Chih Chen, Chien-Yuan Tseng, Tsun-Kai Ko, Chun-Ta Yu, Shih-Chun Ling, Cheng-Hsiung Yen, Hsin-Hsien Wu
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Publication number: 20130320296Abstract: A light-emitting device comprises a semiconductor stacked structure, the semiconductor stacked structure comprising a p-type semiconductor layer, a n-type semiconductor layer and an multiple quantum well structure between the p-type semiconductor layer and the n-type semiconductor layer, wherein the multiple quantum well structure comprises a first multiple quantum well structure near the n-type semiconductor layer and a second multiple quantum well structure near the p-type semiconductor layer, wherein the first multiple quantum well structure has positive interface bound charge and the second multiple quantum well structure has zero interface bound charge.Type: ApplicationFiled: June 5, 2012Publication date: December 5, 2013Applicant: Epistar CorporationInventors: Chun-Ta Yu, Chien-Yuan Tseng, Yu-Yao Lin, Shih-Pang Chang, Hung-Chih Yang
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Patent number: 8198131Abstract: Described herein are stackable semiconductor device packages and related stacked package assemblies and methods. In one embodiment, a manufacturing method includes: (1) providing a substrate including contact pads disposed adjacent to an upper surface of the substrate; (2) applying an electrically conductive material to form conductive bumps disposed adjacent to respective ones of the contact pads; (3) electrically connecting a semiconductor device to the upper surface of the substrate; (4) applying a molding material to form a molded structure covering the conductive bumps and the semiconductor device; (5) forming a set of cutting slits extending partially through the molded structure and the conductive bumps to form truncated conductive bumps; and (6) reflowing the truncated conductive bumps to form reflowed conductive bumps.Type: GrantFiled: July 29, 2010Date of Patent: June 12, 2012Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Yi Weng, Chi-Chih Chu, Chien-Yuan Tseng
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Publication number: 20110117700Abstract: Described herein are stackable semiconductor device packages and related stacked package assemblies and methods. In one embodiment, a manufacturing method includes: (1) providing a substrate including contact pads disposed adjacent to an upper surface of the substrate; (2) applying an electrically conductive material to form conductive bumps disposed adjacent to respective ones of the contact pads; (3) electrically connecting a semiconductor device to the upper surface of the substrate; (4) applying a molding material to form a molded structure covering the conductive bumps and the semiconductor device; (5) forming a set of cutting slits extending partially through the molded structure and the conductive bumps to form truncated conductive bumps; and (6) reflowing the truncated conductive bumps to form reflowed conductive bumps.Type: ApplicationFiled: July 29, 2010Publication date: May 19, 2011Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: CHENG-YI WENG, Chi-Chih Chu, Chien-Yuan Tseng