Patents by Inventor Chih Chan

Chih Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12002855
    Abstract: In a method of manufacturing a semiconductor device including a Fin FET, a fin structure extending in a first direction is formed over a substrate. An isolation insulating layer is formed over the substrate so that an upper portion of the fin structure is exposed from the isolation insulating layer. A gate structure extending in a second direction crossing the first direction is formed over a part of the fin structure. A fin mask layer is formed on sidewalls of a source/drain region of the fin structure. The source/drain region of the fin structure is recessed by a plasma etching process. An epitaxial source/drain structure is formed over the recessed fin structure. In the recessing the source/drain region of the fin structure, the plasma process comprises applying pulsed bias voltage and RF voltage with pulsed power.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui Fu Hsieh, Chih-Teng Liao, Chih-Shan Chen, Yi-Jen Chen, Tzu-Chan Weng
  • Publication number: 20240170835
    Abstract: An antenna structure capable of transmitting a WiGig band for a head-mounted wireless transmission display device including a display screen and an overhead device is disclosed. The antenna structure includes at least two body portions, each of the body portions having at least a signal transceiving end, the body portions are respectively arranged at left and right sides of the display screen, and signal transceiving ends of the body portions are extended outward from the left and right sides of the display screen respectively.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 23, 2024
    Applicant: HTC CORPORATION
    Inventors: Sheng Cherng LIN, Hsiao-Ling CHAN, Chen-Hao CHANG, Chien-Chih CHEN
  • Patent number: 11991185
    Abstract: A method for secure data transmission and a system using the same method are provided. The method includes: coupling a programmable logic device to a server; receiving a first data packet by the server; inputting the first data packet into a machine learning model to predict a protocol type and a command type of the first data packet by the server; verifying whether the protocol type and the command type are correct by the server; adding the first data packet to a data packet information set in response to the protocol type and the command type being correct by the server; generating a filtering rule according to the data packet information set and deploying the filtering rule in the programmable logic device by the server; and performing the secure data transmission according to the filtering rule by the programmable logic device.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: May 21, 2024
    Assignee: BlackBear (Taiwan) Industrial Networking Security Ltd.
    Inventors: Yuan Chen Chan, Po-Chih Hsu, Chun-Hsien Tsai
  • Publication number: 20240145421
    Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Inventors: Kuan-Neng CHEN, Zhong-Jie HONG, Chih-I CHO, Ming-Wei WENG, Chih-Han CHEN, Chiao-Yen WANG, Ying-Chan HUNG, Hong-Yi WU, CHENG-YEN HSIEH
  • Publication number: 20240140765
    Abstract: An overhead hoist transfer apparatus includes a rail assembly including a straight rail having an empty section, and a curved rail having a curved empty section; an engine including a first LSD having first and second wheels at two sides respectively; and a second LSD having third and fourth wheels at two sides respectively; a moving carriage driven by the engine and suspended from the rail assembly; first and second guide wheels disposed on the first LSD; third and fourth guide wheels disposed on the second LSD; and two guide boards disposed above a joining point of the straight rail and the curved rail. An elevation of the guide boards is equal to that of the guide wheels. The guide board includes a straight edge and a curved edge.
    Type: Application
    Filed: September 27, 2023
    Publication date: May 2, 2024
    Inventors: Jung-Chieh Chang, Yi-Sheng Chen, Jen-Yung Hsiao, Chia-Fu Hsiao, Wei-Qi Lao, Chen-Chih Chan, Caung-Yu Liu
  • Patent number: 11964881
    Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 23, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
  • Patent number: 11965783
    Abstract: A temperature sensing circuit that includes a bandgap voltage generation circuit, a current mirror branch, a variable resistor, a comparator circuit, a control circuit and a temperature determining circuit. The bandgap voltage generation circuit generates a bandgap voltage. The current mirror branch generates a mirrored current mirrored from the bandgap voltage generation circuit. The variable resistor is electrically coupled to the current mirror branch to receive the mirrored current to generate a variable voltage. The comparator circuit compares the bandgap voltage and the variable voltage to generate a comparison result. The control circuit generates a control signal according to the comparison result to adjust the resistance of the variable resistor and outputs a signal value when the signal value forces the variable voltage to be equal to the bandgap voltage. The temperature determining circuit generates a temperature value according to the signal value.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: April 23, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chih-Chan Tu, Chih-Lung Chen
  • Patent number: 11968038
    Abstract: Disclosed are systems, methods, and non-transitory computer-readable storage media for monitoring application health via correctable errors. The method includes identifying, by a network device, a network packet associated with an application and detecting an error associated with the network packet. In response to detecting the error, the network device increments a counter associated with the application, determines an application score based at least in part on the counter, and telemeters the application score to a controller. The controller can generate a graphical interface based at least in part on the application score and a timestamp associated with the application score, wherein the graphical interface depicts a trend in correctable errors experienced by the application over a network.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: April 23, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Keerthi Manjunathan Swarnamanjunathan, Chih-Tsung Huang, Kelvin Chan, Wei-Jen Huang
  • Patent number: 11967446
    Abstract: An inductor is disclosed, the inductor comprising: a T-shaped magnetic core, being made of a material comprising an annealed soft magnetic metal material and having a base and a pillar integrally formed with the base, wherein ?CĂ—Hsat?1800, where ?C is a permeability of the T-shaped magnetic core, and Hsat (Oe) is a strength of the magnetic field at 80% of ?C0, where ?C0 is the permeability of the T-shaped magnetic core when the strength of the magnetic field is 0.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: April 23, 2024
    Assignee: CYNTEC CO., LTD.
    Inventors: Chun-Tiao Liu, Lan-Chin Hsieh, Tsung-Chan Wu, Chi-Hsun Lee, Chih-Siang Chuang
  • Patent number: 11962154
    Abstract: The present invention provides an electric power dispatching system and an electric power dispatching method. The electric power dispatching system has a plurality of accommodating spaces, a DC bus, an AC/DC power conversion device, and an energy control center. The swappable battery pack in each accommodating space is coupled to the DC bus, and the AC/DC power conversion device is coupled between the DC bus and a power grid. The electric power dispatching method includes centrally storing a plurality of swappable battery packs from different electric vehicles; and controlling the AC/DC power conversion device and each swappable battery pack located in each accommodating space by an energy control center to designate a part of the swappable battery packs located in the accommodating spaces to participate in a first power dispatch task so as to provide power dispatch to the power grid.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: April 16, 2024
    Inventor: Chih-Chan Ger
  • Publication number: 20240116707
    Abstract: A powered industrial truck includes a lateral movement assembly including four sliding members and four pivotal members both on a wheeled carriage, four links having a first end pivotably secured to the sliding member and a second end pivotably secured to either end of the pivotal member, a motor shaft having two ends pivotably secured to the pivotal members respectively, a first electric motor on one frame member, and four mounts attached to the sliding members respectively; two lift assemblies including a second electric motor, a shaft having two ends rotatably secured to the sliding members respectively, two gear trains at the ends of the shaft respectively, a first gear connected to the second electric motor, a second gear on the shaft, and a first roller chain on the first and second gears; two electric attachments on the platform and being laterally moveable, each attachment. The mount has rollers.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 11, 2024
    Inventors: Jung-Chieh Chang, Yi-Sheng Chen, Jen-Yung Hsiao, Chia-Fu Hsiao, Wei-Qi Lao, Chen-Chih Chan, Chung-Yu Liu
  • Patent number: 11955507
    Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 9, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsin-Hung Li, Wei-Syun Wang, Chih-Chiang Chen, Yu-Cheng Shih, Cheng-Chan Wang, Chia-Hsin Chung, Ming-Jui Wang, Sheng-Ming Huang
  • Patent number: 11949388
    Abstract: A power amplifier includes a power switching circuit, a driver circuit, and an amplifier circuit. The power switching circuit is configured to receive a first voltage and a second voltage, and provide the first voltage or the second voltage according to an operation mode of the power amplifier. The driver circuit is coupled to the power switching circuit. The driver circuit is configured to operate according to the first voltage or the second voltage and generate a driving signal according to an input signal. The amplifier circuit is coupled to the power switching circuit and the driver circuit. The amplifier circuit is configured to operate according to the first voltage or the second voltage and generate an output signal according to the driving signal.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: April 2, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Gen-Sheng Ran, Po-Chih Wang, Ka-Un Chan
  • Publication number: 20240107777
    Abstract: An SOT MRAM structure includes a word line. A second source/drain doping region and a fourth source/drain doping region are disposed at the same side of the word line. A first conductive line contacts the second source/drain doping region. A second conductive line contacts the fourth source/drain doping region. The second conductive line includes a third metal pad. A memory element contacts an end of the first conductive line. A second SOT element covers and contacts a top surface of the memory element. The third metal pad covers and contacts part of the top surface of the second SOT element.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 28, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Wei Kuo, Hung-Chan Lin, Chung-Yi Chiu
  • Patent number: 11942543
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
  • Patent number: 11942906
    Abstract: The present invention provides a transmitter including a mixer, a harmonic impedance adjustment circuit and an amplifier. The mixer is configured to mix a first baseband signal with a first oscillation signal to generate a first mixed signal to a first node, and to mix a second baseband signal with a second oscillation signal to generate a second mixed signal to a second node. The harmonic impedance adjustment circuit is coupled between the first node and the second node, and is configured to reduce harmonic components of the first mixed signal and the second mixed signal to generate an adjusted first mixed signal and an adjusted second mixed signal. The amplifier is coupled to the harmonic impedance adjustment circuit, and is configured to generate an amplified signal according to the adjusted first mixed signal and the adjusted second mixed signal.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ting-Yao Huang, Teng-Yuan Chang, Po-Chih Wang, Ka-Un Chan
  • Patent number: 11942680
    Abstract: An antenna structure capable of transmitting a WiGig band for a head-mounted wireless transmission display device including a display screen and an overhead device is disclosed. The antenna structure includes at least two body portions, each of the body portions having at least a signal transceiving end, the body portions are respectively arranged at left and right sides of the display screen, and signal transceiving ends of the body portions are extended outward from the left and right sides of the display screen respectively.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: March 26, 2024
    Assignee: HTC CORPORATION
    Inventors: Sheng Cherng Lin, Hsiao-Ling Chan, Chen-Hao Chang, Chien-Chih Chen
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240082245
    Abstract: The present invention features interferon-free therapies for the treatment of HCV. Preferably, the treatment is over a shorter duration of treatment, such as no more than 12 weeks. In one aspect, the treatment comprises administering at least two direct acting antiviral agents to a subject with HCV infection, wherein the treatment lasts for 12 weeks and does not include administration of either interferon or ribavirin, and said at least two direct acting antiviral agents comprise (a) Compound 1 or a pharmaceutically acceptable salt thereof and (b) Compound 2 or a pharmaceutically acceptable salt thereof.
    Type: Application
    Filed: November 3, 2023
    Publication date: March 14, 2024
    Inventors: Christine Collins, Bo Fu, Abhishek Gulati, Jens Kort, Matthew Kosloski, Yang Lei, Chih-Wei Lin, Ran Liu, Federico Mensa, Iok Chan NG, Tami Pilot-Matias, David Pugatch, Nancy S. Shulman, Roger Trinh, Rolando M. Viani, Stanley Wang, Zhenzhen Zhang
  • Publication number: 20240078342
    Abstract: Examples described herein relate to a security management system to secure a container ecosystem. In some examples, the security management system may protect one or more entities such as container management applications, container images, containers, and/or executable applications within the containers. The security management system may make use of digital cryptography to generate digital signatures corresponding to one or more of these entities and verify them during the execution so that any compromised entities can be blocked from execution and the container ecosystem may be safeguarded from any malicious network attacks.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Wan-Yen Hsu, Chih-Hao Chang, Lin-Chan Hsiao