Patents by Inventor Chih-Che Lin

Chih-Che Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240176093
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
  • Publication number: 20240178091
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Publication number: 20240170564
    Abstract: An epitaxial structure includes a substrate, a first buffer layer, a second buffer layer, and a channel layer, wherein the first buffer layer is located on a top of the substrate and includes a first portion. The first portion includes a nitride, which is ternary and above, and an aluminum atom concentration of the first portion is less than or equal to 25 at %. The first portion has an element doping, wherein a doping concentration of the element doping of the first portion is greater than or equal to 1×1018 cm?3. The second buffer layer is located on a top of the first buffer layer. The second buffer layer is provided without aluminum and has an element doping. The channel layer is located on a top of the second buffer layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: May 23, 2024
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: PO-JUNG LIN, JIA-ZHE LIU, HONG-CHE LIN, CHIH-YUAN CHUANG
  • Patent number: 11983848
    Abstract: Aspects of the disclosure provide a frame processor for processing frames with aliasing artifacts. For example, the frame processor can include a super-resolution (SR) and anti-aliasing (AA) engine and an attention reference frame generator coupled to the SR and AA engine. The SR and AA engine can be configured to enhance resolution and remove aliasing artifacts of a frame to generate a first high-resolution frame with aliasing artifacts and a second high-resolution frame with aliasing artifacts removed. The attention reference frame generator can be configured to generate an attention reference frame based on the first high-resolution frame and the second high-resolution frame.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: May 14, 2024
    Assignee: MEDIATEK INC.
    Inventors: Cheng-Lung Jen, Pei-Kuei Tsung, Chih-Wei Chen, Yao-Sheng Wang, Shih-Che Chen, Yu-Sheng Lin, Chih-Wen Goo, Shih-Chin Lin, Tsung-Shian Huang, Ying-Chieh Chen
  • Publication number: 20240120338
    Abstract: A semiconductor device structure is provided. The semiconductor device has a first dielectric wall between an n-type source/drain region and a p-type source/drain region to physically and electrically isolate the n-type source/drain region and the p-type source/drain region from each other. A second dielectric wall is formed between a first channel region connected to the n-type source/drain region and a second channel region connected to the p-type source/drain region. A contact is formed to physically and electrically connect the n-type source/drain region with the p-type source/drain region, wherein the contact extends over the first dielectric wall. The first electric wall has a gradually decreasing width W5 towards a tip of the dielectric wall from a top contact position between the first dielectric wall and either the n-type source/drain region or the p-type source/drain region.
    Type: Application
    Filed: February 15, 2023
    Publication date: April 11, 2024
    Inventors: Ta-Chun LIN, Ming-Che CHEN, Yu-Hsuan LU, Chih-Hao CHANG
  • Patent number: 11949056
    Abstract: The light emitting diode packaging structure includes a flexible substrate, a first adhesive layer, micro light emitting elements, a conductive pad, a redistribution layer, and an electrode pad. The first adhesive layer is disposed on the flexible substrate. The micro light emitting elements are disposed on the first adhesive layer and have a first surface facing to the first adhesive layer and an opposing second surface. The micro light emitting elements include a red micro light emitting element, a blue micro light emitting element, and a green micro light emitting element. The conductive pad is disposed on the second surface of the micro light emitting element. The redistribution layer covers the micro light emitting elements and the conductive pad. The electrode pad is disposed on the redistribution layer and is electrically connected to the circuit layer. A thickness of the flexible substrate is less than 100 um.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: April 2, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Chih-Hao Lin, Jo-Hsiang Chen, Shih-Lun Lai, Min-Che Tsai, Jian-Chin Liang
  • Patent number: 11942419
    Abstract: An integrated circuit structure includes a dielectric layer and an etch stop layer. The etch stop layer includes a first sub layer including a metal nitride over the first dielectric layer, and a second sub layer overlying or underlying the first sub layer. The second sub layer includes a metal compound comprising an element selected from carbon and oxygen, and is in contact with the first sub layer.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko JangJian, Tsung-Hsuan Hong, Chun Che Lin, Chih-Nan Wu
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 11935804
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Patent number: 11632106
    Abstract: A switch device includes a first node, a switch unit, an adjustment switch, an impedance element, a second node and a detection unit. A first terminal of the switch unit is coupled to the first node. A first terminal and a second terminal of the adjustment switch are respectively coupled to a second terminal of the switch unit and a reference voltage terminal. A first terminal and a second terminal of the impedance element are respectively coupled to the first terminal and the second terminal of the adjustment switch. The detection unit is coupled to the second node, and a control terminal of the switch unit and a control terminal of the adjustment switch. The detection unit detects a node signal at the second node to accordingly control the switch unit and the adjustment switch.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: April 18, 2023
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Chih-Che Lin, Yu-Siang Huang, Hsuan-Der Yen
  • Publication number: 20230109162
    Abstract: A switch device includes a first node, a switch unit, an adjustment switch, an impedance element, a second node and a detection unit. A first terminal of the switch unit is coupled to the first node. A first terminal and a second terminal of the adjustment switch are respectively coupled to a second terminal of the switch unit and a reference voltage terminal. A first terminal and a second terminal of the impedance element are respectively coupled to the first terminal and the second terminal of the adjustment switch. The detection unit is coupled to the second node, and a control terminal of the switch unit and a control terminal of the adjustment switch. The detection unit detects a node signal at the second node to accordingly control the switch unit and the adjustment switch.
    Type: Application
    Filed: December 2, 2021
    Publication date: April 6, 2023
    Applicant: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Chih-Che Lin, Yu-Siang Huang, Hsuan-Der Yen
  • Publication number: 20230041666
    Abstract: An autonomous water quality sensing apparatus, a system and a method for operating the apparatus are provided. In the autonomous water quality sensing system, the autonomous water quality sensing apparatus is configured to move on a track. In the method, a driving mechanism is used to drive the autonomous water quality sensing apparatus to operate over an elevated track surrounding one or more pools. The autonomous water quality sensing apparatus includes a sensing device. The sensor is put into the pool at a planned stop by a sensor deploying mechanism of the autonomous water quality sensing apparatus, so as to obtain water quality data of each of the pools according to a routing plan and a length setting.
    Type: Application
    Filed: August 3, 2021
    Publication date: February 9, 2023
    Inventor: CHIH-CHE LIN
  • Patent number: 11566954
    Abstract: The disclosure relates to a force measurement device including central portion, fixing portion, first and second sensing portions, and first and second electromechanical elements. The first sensing portion has first natural frequency. The first sensing portion is connected to the central portion. The second sensing portion has a second natural frequency. The second sensing portion is connected to the first sensing portion and the fixing portion. The first electromechanical element is disposed on the first sensing portion to measure a first vibration amplitude. The second electromechanical element is disposed on the second sensing portion to measure a second vibration amplitude. When the central portion is subjected to a first force, the first vibration amplitude is larger than the second vibration amplitude. When the central portion is subjected to a second force, the first vibration amplitude is smaller than the second vibration amplitude.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: January 31, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Che Lin, Chih-Yuan Chen, Chung-Yuan Su, Chao-Ta Huang
  • Publication number: 20220382174
    Abstract: The present disclosure describes a lithography apparatus comprising a photoresist coating unit configured to perform one or more coating processes on a substrate. The lithography apparatus further comprises a detection unit configured to determine a contamination level of a contaminant from the one or more coating processes adheres on a sidewall of the lithography apparatus. The lithography apparatus further comprises a controller unit configured to adjust one or more operations of the lithography apparatus based on a comparison between the contamination level and a baseline cleanliness requirement of the lithography apparatus.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Chun HSIEH, Chih-Che LIN, Pei-Yi SU
  • Patent number: 11448978
    Abstract: The present disclosure describes a lithography apparatus comprising a photoresist coating unit configured to perform one or more coating processes on a substrate. The lithography apparatus further comprises a detection unit configured to determine a contamination level of a contaminant from the one or more coating processes adheres on a sidewall of the lithography apparatus. The lithography apparatus further comprises a controller unit configured to adjust one or more operations of the lithography apparatus based on a comparison between the contamination level and a baseline cleanliness requirement of the lithography apparatus.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Chun Hsieh, Chih-Che Lin, Pei-Yi Su
  • Patent number: 11256180
    Abstract: A method includes transferring a wafer into a first processing chamber by using a robot arm mechanism, and applying a photoresist on the wafer in a first processing chamber. The wafer is transferred from the first processing chamber into a second processing chamber by using the robot arm mechanism, and the photoresist is exposed to a pattern of light in the second processing chamber. The method includes transferring the wafer from the second processing chamber into a third processing chamber by using the robot arm mechanism, and developing the exposed wafer in the third processing chamber. The method includes cleaning the robot arm mechanism in a dummy chamber.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: February 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu-Chun Hsieh, Pei-Yi Su, Chih-Che Lin
  • Patent number: 11232052
    Abstract: A timing control method and system applied on the network simulator platform are disclosed. When at least one subprocess calls a system call to enter a blocking I/O, a marking operation is performed, the kernel issues a first notification event to a network simulator, to request the network simulator to pause until the subprocess leaves from the blocking I/O. when the kernel detects that the subprocess leaves from the blocking I/O already, the kernel issues a second notification event to the network simulator, so that the network simulator continues to simulate. The present invention can control the subprocess to not continuously occupy resource, and first and second notification events can prevent a simulator timer from continuously running during the subprocess execution period, to cause an abnormal timing of a simulation result.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: January 25, 2022
    Assignee: Estinet Technologies Incorporation
    Inventors: Chih-Che Lin, Ting-Wei Ho
  • Patent number: 11177901
    Abstract: A method of WDM-aware optical routing for on-chip devices is proposed, which is executed by a computer, the method comprising using the computer to perform the following steps of: performing a path separation to identify signal net candidates; performing a path clustering to find path clusters of the signal net candidates; performing an endpoint placement to find legal locations for WDM endpoints; and performing a pin-to-waveguide routing all nets to corresponding WDM waveguides.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: November 16, 2021
    Assignee: ANAGLOBE TECHNOLOGY, INC.
    Inventors: Yu-Sheng Lu, Sheng-Jung Yu, Yao-Wen Chang, Chih-Che Lin, Yu-Tsang Hsieh
  • Publication number: 20210223709
    Abstract: The present disclosure describes a lithography apparatus comprising a photoresist coating unit configured to perform one or more coating processes on a substrate. The lithography apparatus further comprises a detection unit configured to determine a contamination level of a contaminant from the one or more coating processes adheres on a sidewall of the lithography apparatus. The lithography apparatus further comprises a controller unit configured to adjust one or more operations of the lithography apparatus based on a comparison between the contamination level and a baseline cleanliness requirement of the lithography apparatus.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Chun Hsieh, Chih-Che Lin, Pei-Yi Su
  • Publication number: 20210199518
    Abstract: The disclosure relates to a force measurement device including central portion, fixing portion, first and second sensing portions, and first and second electromechanical elements. The first sensing portion has first natural frequency. The first sensing portion is connected to the central portion. The second sensing portion has a second natural frequency. The second sensing portion is connected to the first sensing portion and the fixing portion. The first electromechanical element is disposed on the first sensing portion to measure a first vibration amplitude. The second electromechanical element is disposed on the second sensing portion to measure a second vibration amplitude. When the central portion is subjected to a first force, the first vibration amplitude is larger than the second vibration amplitude. When the central portion is subjected to a second force, the first vibration amplitude is smaller than the second vibration amplitude.
    Type: Application
    Filed: June 11, 2020
    Publication date: July 1, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Che LIN, Chih-Yuan CHEN, Chung-Yuan SU, Chao-Ta HUANG