Patents by Inventor Chih-Che Liu

Chih-Che Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178091
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Publication number: 20240170564
    Abstract: An epitaxial structure includes a substrate, a first buffer layer, a second buffer layer, and a channel layer, wherein the first buffer layer is located on a top of the substrate and includes a first portion. The first portion includes a nitride, which is ternary and above, and an aluminum atom concentration of the first portion is less than or equal to 25 at %. The first portion has an element doping, wherein a doping concentration of the element doping of the first portion is greater than or equal to 1×1018 cm?3. The second buffer layer is located on a top of the first buffer layer. The second buffer layer is provided without aluminum and has an element doping. The channel layer is located on a top of the second buffer layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: May 23, 2024
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: PO-JUNG LIN, JIA-ZHE LIU, HONG-CHE LIN, CHIH-YUAN CHUANG
  • Publication number: 20240172434
    Abstract: A semiconductor device includes a stacked gate structure, a plurality of stacks and a first conductive layer. The stacks are disposed aside the stacked gate structure and arranged along both a first direction and a second direction perpendicular to the first direction, wherein the stacks are extended continuously along the first direction and segmented in the second direction. The first conductive layer is disposed between segmented portions of the stacks along the second direction, wherein top surfaces of the segmented portions of the stacks are higher than a top surface of the first conductive layer.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Patent number: 11935804
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Patent number: 11925017
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Patent number: 10647091
    Abstract: The present invention discloses a planar glass sealing structure and a manufacturing method thereof, the planar glass sealing structure comprises, in a top-down order: a first glass substrate, an insulating layer, a metal sealing frame and a second glass substrate. The insulating layer is formed as a frame shape, and disposed on a peripheral margin of the first glass substrate; the metal sealing frame is formed by heating to melt a metal solder layer between the first and second glass substrate, and it can keep a fixed gap between the first and second glass substrate, so that an inner space thereof is kept in an excellent sealed condition. The present invention can ensure the sealing structure of two correspondingly assembled glass substrates, so that the inner space thereof is insulated from moisture and oxygen, so as to increase the performance and quality of the device.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: May 12, 2020
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yawei Liu, Tai-pi Wu, Chih-Che Liu
  • Patent number: 9078329
    Abstract: A method of fabricating a light emitting device is provided. A mother substrate including a plurality of light emitting units thereon is provided. A cover plate comprising a plurality of unit regions is provided. Each of the unit regions corresponds to one of the light emitting units. The cover plate further comprises a cutting line, a plurality of sealant regions and spacer disposing regions. A glass frit is coated on the cover plate in the sealant regions and the spacer disposing regions. A curing process is performed to solidify the glass frit in the sealant regions to form a sealant and solidify the glass frit in the spacer disposing regions to form a spacer structure. The cover plate is disposed on the mother substrate. A laser process is performed to the sealant but not the spacer structure so as to bond the cover plate and the mother substrate together.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: July 7, 2015
    Assignee: Au Optronics Corporation
    Inventors: Chih-Che Liu, Shih-Feng Hsu
  • Patent number: 9065079
    Abstract: A fabrication method of a pixel structure of an electroluminescent display panel includes the following steps. A substrate is provided. A first anode, a second anode and a third anode are formed in a first sub-pixel region, a second sub-pixel region and a third sub-pixel region respectively. A first organic light-emitting layer is formed in the first sub-pixel region by using a first fine metal mask. A second organic light-emitting layer is formed in the second sub-pixel region and the third sub-pixel region by using a second fine metal mask. A first cathode, a second cathode and a third cathode are formed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, respectively. The first micro cavity in the first sub-pixel region, the second micro cavity in the second sub-pixel region and the third micro cavity have different cavity lengths.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: June 23, 2015
    Assignee: AU Optronics Corp.
    Inventors: Meng-Yu Liu, Chih-Che Liu, Shih-Feng Hsu
  • Publication number: 20150155524
    Abstract: The present invention provides a white organic light-emitting device having a substrate, an organic light-emitting unit and an efficiency-enhancing layer. The organic light-emitting unit has a first electrode, a second electrode and an organic layer. The first electrode is disposed on the substrate. The second electrode is disposed opposite to the first electrode. The organic layer is disposed between the first electrode and the second electrode. The efficiency-enhancing layer is disposed on a light-emitting surface of the organic light-emitting unit. The efficiency-enhancing layer can effectively adjust the chromaticity coordinates value and improve light efficiency of the white organic light-emitting device so that directly adjusting the internal structure of the organic light-emitting unit can be avoid.
    Type: Application
    Filed: June 28, 2013
    Publication date: June 4, 2015
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Chih-Che Liu
  • Patent number: 8963136
    Abstract: The present invention relates to a method for laminating an alignment film onto an organic light emitting diode. The method includes a) deploying a bonding agent over a surface of the organic light emitting diode; b) laminating the alignment film with the organic light emitting diode on the surface deployed with bonding agent; and c) curing the bonding agent with heat or light such that the alignment film and the organic light emitting diode are completely laminated. The present invention further discloses an LED display device. By way of foregoing, during the lamination of the alignment film, bubbles can be avoided, and the yield can be increased.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: February 24, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Chih-Che Liu, Yuan-chun Wu
  • Publication number: 20140342483
    Abstract: A fabrication method of a pixel structure of an electroluminescent display panel includes the following steps. A substrate is provided. A first anode, a second anode and a third anode are formed in a first sub-pixel region, a second sub-pixel region and a third sub-pixel region respectively. A first organic light-emitting layer is formed in the first sub-pixel region by using a first fine metal mask. A second organic light-emitting layer is formed in the second sub-pixel region and the third sub-pixel region by using a second fine metal mask. A first cathode, a second cathode and a third cathode are formed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, respectively. The first micro cavity in the first sub-pixel region, the second micro cavity in the second sub-pixel region and the third micro cavity have different cavity lengths.
    Type: Application
    Filed: August 6, 2014
    Publication date: November 20, 2014
    Inventors: Meng-Yu Liu, Chih-Che Liu, Shih-Feng Hsu
  • Publication number: 20140322458
    Abstract: The present invention discloses a planar glass sealing structure and a manufacturing method thereof, the planar glass sealing structure comprises, in a top-down order: a first glass substrate, an insulating layer, a metal sealing frame and a second glass substrate. The insulating layer is formed as a frame shape, and disposed on a peripheral margin of the first glass substrate; the metal sealing frame is formed by heating to melt a metal solder layer between the first and second glass substrate, and it can keep a fixed gap between the first and second glass substrate, so that an inner space thereof is kept in an excellent sealed condition. The present invention can ensure the sealing structure of two correspondingly assembled glass substrates, so that the inner space thereof is insulated from moisture and oxygen, so as to increase the performance and quality of the device.
    Type: Application
    Filed: June 27, 2013
    Publication date: October 30, 2014
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yawei Liu, Tai-pi Wu, Chih-Che Liu
  • Patent number: 8847857
    Abstract: A pixel structure of electroluminescent display panel has a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region. The pixel structure of electroluminescent display panel includes a first organic light-emitting layer, and a second organic light-emitting layer. The first organic light-emitting layer is disposed in the first sub-pixel region for generating a first primary color light in the first sub-pixel region. The second organic light-emitting layer is disposed in the second sub-pixel region, and the third sub-pixel region for generating a second primary color light in the second sub-pixel region, and for generating a third primary color light in the third sub-pixel region. The first sub-pixel region, the second sub-pixel region, and the third sub-pixel region have different cavity lengths.
    Type: Grant
    Filed: November 11, 2012
    Date of Patent: September 30, 2014
    Assignee: AU Optronics Corp.
    Inventors: Meng-Yu Liu, Chih-Che Liu, Shih-Feng Hsu
  • Publication number: 20140227930
    Abstract: A method of fabricating a light emitting device is provided. A mother substrate including a plurality of light emitting units thereon is provided. A cover plate comprising a plurality of unit regions is provided. Each of the unit regions corresponds to one of the light emitting units. The cover plate further comprises a cutting line, a plurality of sealant regions and spacer disposing regions. A glass frit is coated on the cover plate in the sealant regions and the spacer disposing regions. A curing process is performed to solidify the glass frit in the sealant regions to form a sealant and solidify the glass frit in the spacer disposing regions to form a spacer structure. The cover plate is disposed on the mother substrate. A laser process is performed to the sealant but not the spacer structure so as to bond the cover plate and the mother substrate together.
    Type: Application
    Filed: April 18, 2014
    Publication date: August 14, 2014
    Applicant: Au Optronics Corporation
    Inventors: Chih-Che Liu, Shih-Feng Hsu
  • Patent number: 8797494
    Abstract: A display device includes a first substrate, a second substrate and a sealing material. The first substrate includes an active area and a driving circuit. The driving circuit has a first side facing the active area and a second side opposite to the first side. The second substrate includes a mask layer. A projection of the mask layer on the first substrate at least overlaps the driving circuit from the second side to the first side. The sealing material is between the second substrate and the first substrate, used for sealing the second substrate and the first substrate, and located beside the second side of the driving circuit.
    Type: Grant
    Filed: January 5, 2014
    Date of Patent: August 5, 2014
    Assignee: AU Optronics Corp.
    Inventors: Chih-Che Liu, Shih-Feng Hsu
  • Publication number: 20140203246
    Abstract: The present invention provides a diode and display panel, which includes: cathode and anode; wherein, cathode and anode being disposed relatively. Electron transport layer is disposed between cathode and anode. Electron transport layer is doped with alkali metal compounds, which is a material used to form electron injection layers. Alkali metal compounds comprise at least one of the materials from lithium metaborate, potassium silicate, lithium tetra (8-hydroxyquinolinato) boron, and alkali metal acetate. The present invention improves the light-emitting performance, lowers operating voltage, simplifies the manufacturing process, and increases the yield rate; as a result, to reduce the cost of diodes.
    Type: Application
    Filed: January 25, 2013
    Publication date: July 24, 2014
    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Chih-che Liu, Yi-Fan Wang
  • Patent number: 8749135
    Abstract: A mother substrate structure includes a mother substrate, a cover plate, a sealant and a spacer structure. The mother substrate has light emitting units thereon. The cover plate is disposed above the mother substrate and has unit regions, each unit region corresponding to one of the light emitting unit. The cover plate has a cutting line around each unit region, sealant regions between the cutting line and each of the unit regions, and spacer disposing regions between the cutting line and each of the sealant regions, wherein a distance between the cutting line and each of the spacer disposing region is 0˜100 um. The sealant is disposed in the sealant regions to bond the mother substrate and the cover plate. The spacer structure is disposed in the spacer disposing regions and surrounds each of the light emitting units, and materials of the spacer structure and the sealant include a glass fit.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: June 10, 2014
    Assignee: Au Optronics Corporation
    Inventors: Chih-Che Liu, Shih-Feng Hsu
  • Publication number: 20140124743
    Abstract: The present invention relates to a method for laminating an alignment film onto an organic light emitting diode. The method includes a) deploying a bonding agent over a surface of the organic light emitting diode; b) laminating the alignment film with the organic light emitting diode on the surface deployed with bonding agent; and c) curing the bonding agent with heat or light such that the alignment film and the organic light emitting diode are completely laminated. The present invention further discloses an LED display device. By way of foregoing, during the lamination of the alignment film, bubbles can be avoided, and the yield can be increased.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Chih-Che Liu, Yuan-chun Wu
  • Publication number: 20140102635
    Abstract: A display device includes a first substrate, a second substrate and a sealing material. The first substrate includes an active area and a driving circuit. The driving circuit has a first side facing the active area and a second side opposite to the first side. The second substrate includes a mask layer. A projection of the mask layer on the first substrate at least overlaps the driving circuit from the second side to the first side. The sealing material is between the second substrate and the first substrate, used for sealing the second substrate and the first substrate, and located beside the second side of the driving circuit.
    Type: Application
    Filed: January 5, 2014
    Publication date: April 17, 2014
    Applicant: AU Optronics Corp.
    Inventors: Chih-Che Liu, Shih-Feng Hsu
  • Patent number: 8670092
    Abstract: A display device includes a first substrate, a second substrate and a sealing material. The first substrate includes an active area and a driving circuit. The driving circuit has a first side facing the active area and a second side opposite to the first side. The second substrate includes a mask layer. A projection of the mask layer on the first substrate at least overlaps the driving circuit from the second side to the first side. The sealing material is between the second substrate and the first substrate, used for sealing the second substrate and the first substrate, and located beside the second side of the driving circuit.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: March 11, 2014
    Assignee: AU Optronics Corp.
    Inventors: Chih-Che Liu, Shih-Feng Hsu